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ADG719BRTZ-REEL7

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Analog Devices Analog Switches, Multiplexers, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADG719BRTZ-REEL7

Analog Devices · Analog Switches, Multiplexers · SOT-23-6

ADG719BRTZ-REEL7 from Analog Devices, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Digital switch control pin; a logic 0 turns S1 on and S2 off, and a logic 1 turns S1 off and S2 on.
2 VDD power_in Most positive power supply pin; the part operates from a 1.8 V to 5.5 V single supply.
3 GND power_in Ground (0 V) reference pin.
4 S1 bidirectional Source terminal that can be used as an input or output.
5 D bidirectional Drain terminal that can be used as an input or output.
6 S2 bidirectional Source terminal that can be used as an input or output.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOT-23-6
Category Interface
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On Resistance (multi-value cell, 5 V table, order as printed: 4 / 5 / 7) RON 2.5 4 Ω VS = 0 V to VDD, IS = −10 mA; See Figure 14; VDD = 5 V ± 10% 3
On Resistance (multi-value cell, 5 V table, order as printed: 4 / 5 / 7) RON 5 Ω VS = 0 V to VDD, IS = −10 mA; See Figure 14; VDD = 5 V ± 10% 3
On Resistance (multi-value cell, 5 V table, order as printed: 4 / 5 / 7) RON 7 Ω VS = 0 V to VDD, IS = −10 mA; See Figure 14; VDD = 5 V ± 10% 3
On Resistance Match Between Channels (multi-value cell, 5 V) ΔRON 0.1 0.4 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 5 V ± 10% 3
On Resistance Match Between Channels (multi-value cell, 5 V) ΔRON 0.4 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 5 V ± 10% 3
On Resistance Flatness (multi-value cell, 5 V) RFLAT(ON) 0.75 1.2 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 5 V ± 10% 3
On Resistance Flatness (multi-value cell, 5 V) RFLAT(ON) 1.5 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 5 V ± 10% 3
Source Off Leakage IS(Off) (multi-value cell, 5.5 V) IS(Off) -0.25 0.01 0.25 nA VDD = 5.5 V; VS = 4.5 V/1 V, VD = 1 V/4.5 V; See Figure 15 3
Source Off Leakage IS(Off) (multi-value cell, 5.5 V) IS(Off) -0.35 0.35 nA VDD = 5.5 V; VS = 4.5 V/1 V, VD = 1 V/4.5 V; See Figure 15 3
Source Off Leakage IS(Off) (multi-value cell, 5.5 V) IS(Off) -1 1 nA VDD = 5.5 V; VS = 4.5 V/1 V, VD = 1 V/4.5 V; See Figure 15 3
Channel On Leakage ID, IS(On) (multi-value cell, 5.5 V) ID, IS(On) -0.25 0.01 0.25 nA VDD = 5.5 V; VS = VD = 1 V or VS = VD = 4.5 V; See Figure 16 3
Channel On Leakage ID, IS(On) (multi-value cell, 5.5 V) ID, IS(On) -0.35 0.35 nA VDD = 5.5 V; VS = VD = 1 V or VS = VD = 4.5 V; See Figure 16 3
Channel On Leakage ID, IS(On) (multi-value cell, 5.5 V) ID, IS(On) -5 5 nA VDD = 5.5 V; VS = VD = 1 V or VS = VD = 4.5 V; See Figure 16 3
Input High Voltage VINH 2.4 V 3
Input Low Voltage VINL 0.8 V 3
Input Current IINL or IINH -0.1 0.005 0.1 μA VIN = VINL or VINH 3
Turn-On Time tON tON 7 12 ns RL = 300 Ω, CL = 35 pF; VS = 3 V; See Figure 17 3
Turn-Off Time tOFF tOFF 3 6 ns RL = 300 Ω, CL = 35 pF; VS = 3 V; See Figure 17 3
Break-Before-Make Time Delay tD 1 8 ns RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; See Figure 18 3
Power Supply Current (VDD = 5.5 V) IDD 0.001 1 μA Digital inputs = 0 V or 5.5 V 3
On Resistance (multi-value cell, 3 V table; printed values 10 and 12, temperature column not labelled) RON 6 10 Ω VS = 0 V to VDD, IS = −10 mA; See Figure 14; VDD = 3 V ± 10% 4
On Resistance (multi-value cell, 3 V table; printed values 10 and 12, temperature column not labelled) RON 7 12 Ω VS = 0 V to VDD, IS = −10 mA; See Figure 14; VDD = 3 V ± 10% 4
On Resistance Match Between Channels (multi-value cell, 3 V) ΔRON 0.1 0.4 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 3 V ± 10% 4
On Resistance Match Between Channels (multi-value cell, 3 V) ΔRON 0.4 Ω VS = 0 V to VDD, IS = −10 mA; VDD = 3 V ± 10% 4
Source Off Leakage IS(Off) (multi-value cell, 3.3 V) IS(Off) -0.25 0.01 0.25 nA VDD = 3.3 V; VS = 3 V/1 V, VD = 1 V/3 V; See Figure 15 4
Source Off Leakage IS(Off) (multi-value cell, 3.3 V) IS(Off) -0.35 0.35 nA VDD = 3.3 V; VS = 3 V/1 V, VD = 1 V/3 V; See Figure 15 4
Source Off Leakage IS(Off) (multi-value cell, 3.3 V) IS(Off) -1 1 nA VDD = 3.3 V; VS = 3 V/1 V, VD = 1 V/3 V; See Figure 15 4
Channel On Leakage ID, IS(On) (multi-value cell, 3.3 V) ID, IS(On) -0.25 0.01 0.25 nA VDD = 3.3 V; VS = VD = 1 V or VS = VD = 3 V; See Figure 16 4
Channel On Leakage ID, IS(On) (multi-value cell, 3.3 V) ID, IS(On) -0.35 0.35 nA VDD = 3.3 V; VS = VD = 1 V or VS = VD = 3 V; See Figure 16 4
Channel On Leakage ID, IS(On) (multi-value cell, 3.3 V) ID, IS(On) -5 5 nA VDD = 3.3 V; VS = VD = 1 V or VS = VD = 3 V; See Figure 16 4
Input High Voltage (3 V table) VINH 2 V 4
Input Low Voltage (3 V table) VINL 0.8 V 4
Input Current (3 V table) IINL or IINH -0.1 0.005 0.1 μA VIN = VINL or VINH 4
Turn-On Time tON (3 V table) tON 10 15 ns RL = 300 Ω, CL = 35 pF; VS = 2 V; See Figure 17 4
Turn-Off Time tOFF (3 V table) tOFF 4 8 ns RL = 300 Ω, CL = 35 pF; VS = 2 V; See Figure 17 4
Break-Before-Make Time Delay tD (3 V table) tD 1 8 ns RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V; See Figure 18 4
Power Supply Current (VDD = 3.3 V) IDD 0.001 1 μA VDD = 3.3 V; Digital inputs = 0 V or 3.3 V 4
Analog Signal Range 0 V 0 V to VDD 3
Single Supply Voltage Range VDD 1.8 5.5 V Single supply, stated in Features and General Description (no supply table) 1
VDD to GND VDD -0.3 7 V 5
Analog, Digital Inputs voltage -0.3 V Upper limit VDD + 0.3 V (or 30 mA, whichever occurs first); overvoltages clamped by internal diodes 5
Analog, Digital Inputs current 30 mA Whichever occurs first with VDD + 0.3 V input limit 5
Peak Current, S or D 100 mA Pulsed at 1 ms, 10% duty cycle max 5
Continuous Current, S or D 30 mA 5
Operating Temperature Range -40 125 °C 5
Storage Temperature Range -65 150 °C 5
Junction Temperature 150 °C 5
Power Dissipation (SOT-23 package) 282 mW SOT-23 package 5
Lead Temperature, Soldering 300 °C 10 sec 5
IR Reflow, Peak Temperature 220 °C <20 sec 5
Pb-Free Reflow, Peak Temperature 260 °C Printed as 260(+0/−5)°C 5
Time at Peak Temperature (Pb-Free reflow) 20 40 sec 5
ESD 1 kV Printed as a single value, no qualifier 5
θJA Thermal Impedance (SOT-23) θJA 229.6 °C/W SOT-23 package 5
θJC Thermal Impedance (SOT-23) θJC 91.99 °C/W SOT-23 package 5

CAD (KiCad official)

  • Symbol: ADG719BRTZ-REEL7
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: adg719brtz-reel7-etched.step / adg719brtz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg719brtz-reel7.step / adg719brtz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 02c35a7b35ae4770, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF