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ADG714BRUZ

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Analog Devices Analog Switches, Multiplexers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADG714BRUZ

Analog Devices · Analog Switches, Multiplexers · TSSOP-24

ADG714BRUZ from Analog Devices, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial clock input; data is clocked into the input shift register on the falling edge of SCLK, at serial input rates of up to 30 MHz.
2 VDD power_in Positive analog supply voltage.
3 DIN input Serial data input; data is clocked into the 8-bit input register on the falling edge of SCLK.
4 GND power_in Ground reference.
5 S1 passive Source terminal of switch 1; may be an input or an output.
6 D1 passive Drain terminal of switch 1; may be an input or an output.
7 S2 passive Source terminal of switch 2; may be an input or an output.
8 D2 passive Drain terminal of switch 2; may be an input or an output.
9 S3 passive Source terminal of switch 3; may be an input or an output.
10 D3 passive Drain terminal of switch 3; may be an input or an output.
11 S4 passive Source terminal of switch 4; may be an input or an output.
12 D4 passive Drain terminal of switch 4; may be an input or an output.
13 D5 passive Drain terminal of switch 5; may be an input or an output.
14 S5 passive Source terminal of switch 5; may be an input or an output.
15 D6 passive Drain terminal of switch 6; may be an input or an output.
16 S6 passive Source terminal of switch 6; may be an input or an output.
17 D7 passive Drain terminal of switch 7; may be an input or an output.
18 S7 passive Source terminal of switch 7; may be an input or an output.
19 D8 passive Drain terminal of switch 8; may be an input or an output.
20 S8 passive Source terminal of switch 8; may be an input or an output.
21 VSS power_in Negative analog supply voltage; for single-supply operation, tie this pin to ground.
22 DOUT output Serial data output for daisy-chaining; data is clocked out on the rising edge of SCLK, and it is an open-drain output that must be pulled to the supply with an external pull-up resistor.
23 RESET input Active-low control input that clears the input register and turns all switches off.
24 SYNC input Active-low frame synchronization input; when SYNC goes low it enables the SCLK and DIN buffers and the input shift register, and taking SYNC high updates the switches.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-24
Category Interface
Pins 24

CAD (KiCad official)

  • Symbol: ADG714BRUZ
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: adg714bruz-etched.step / adg714bruz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg714bruz.step / adg714bruz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (21 pp, sha256 315b2fb950e0fa91, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF