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ADG713BRUZ-REEL7

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Analog Devices Analog Switches, Multiplexers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADG713BRUZ-REEL7

Analog Devices · Analog Switches, Multiplexers · TSSOP-16

ADG713BRUZ-REEL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Digital control input whose logic state controls switch S1-D1 (ADG713 logic: 0 turns switches 1 and 4 off and switches 2 and 3 on, per the truth table).
2 D1 passive Drain pin of switch 1; can be used as input or output.
3 S1 passive Source pin of switch 1; can be used as input or output, with analog signal range 0 V to VDD.
4 NC unconnected Not internally connected; do not connect to this pin.
5 GND power_in The most negative power supply pin, specified at 0 V.
6 S4 passive Source pin of switch 4; can be used as input or output, with analog signal range 0 V to VDD.
7 D4 passive Drain pin of switch 4; can be used as input or output.
8 IN4 input Digital control input whose logic state controls switch S4-D4 (ADG713 logic: inverted relative to switches 2 and 3, per the truth table).
9 IN3 input Digital control input whose logic state controls switch S3-D3 (ADG713 logic: 0 turns switch 3 on, per the truth table).
10 D3 passive Drain pin of switch 3; can be used as input or output.
11 S3 passive Source pin of switch 3; can be used as input or output, with analog signal range 0 V to VDD.
12 NC unconnected Not internally connected; do not connect to this pin.
13 VDD power_in The most positive power supply pin; the device is specified for a single 1.8 V to 5.5 V supply.
14 S2 passive Source pin of switch 2; can be used as input or output, with analog signal range 0 V to VDD.
15 D2 passive Drain pin of switch 2; can be used as input or output.
16 IN2 input Digital control input whose logic state controls switch S2-D2 (the datasheet's pin table text says S3-D3, which appears to be a typo; the block diagram and pin layout indicate S2-D2).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Signal Range 0 V 0 V to VDD (max printed as VDD, not numeric); VDD = +5 V ± 10% 3
On Resistance (RON) RON 2.5 4 Ω VDD = +5 V ± 10%; +25°C column; VS = 0 V to VDD, IS = −10 mA; see Figure 11 3
On Resistance (RON) RON 4.5 Ω VDD = +5 V ± 10%; −40°C to +85°C column; VS = 0 V to VDD, IS = −10 mA; see Figure 11 3
On Resistance Match Between Channels (ΔRON) ΔRON 0.05 0.3 Ω VDD = +5 V ± 10%; −40°C to +85°C column; VS = 0 V to VDD, IS = −10 mA 3
On Resistance Flatness (RFLAT(ON)) RFLAT(ON) 0.5 1 Ω VDD = +5 V ± 10%; −40°C to +85°C column; VS = 0 V to VDD, IS = −10 mA 3
Source Off Leakage IS(Off) IS (Off) -0.1 0.01 0.1 nA VDD = +5.5 V; +25°C column; VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 12 3
Source Off Leakage IS(Off) IS (Off) -0.2 0.2 nA VDD = +5.5 V; −40°C to +85°C column; VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 12 3
Drain Off Leakage ID(Off) ID (Off) -0.1 0.01 0.1 nA VDD = +5.5 V; +25°C column; VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 12 3
Drain Off Leakage ID(Off) ID (Off) -0.2 0.2 nA VDD = +5.5 V; −40°C to +85°C column; VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 12 3
Channel On Leakage ID, IS(On) ID, IS (On) -0.1 0.01 0.1 nA VDD = +5.5 V; +25°C column; VS = VD = 1 V, or 4.5 V; see Figure 13 3
Channel On Leakage ID, IS(On) ID, IS (On) -0.2 0.2 nA VDD = +5.5 V; −40°C to +85°C column; VS = VD = 1 V, or 4.5 V; see Figure 13 3
Input High Voltage VINH 2.4 V 3
Input Low Voltage VINL 0.8 V 3
Input Current IINL or IINH -0.1 0.005 0.1 μA VIN = VINL or VINH 3
Turn-On Time tON tON 11 16 ns typ: RL = 300 Ω, CL = 35 pF; max: VS = 3 V; see Figure 14 3
Turn-Off Time tOFF tOFF 6 10 ns typ: RL = 300 Ω, CL = 35 pF; max: VS = 3 V; see Figure 14 3
Break-Before-Make Time Delay tD (ADG713 only) tD 1 6 ns typ: RL = 300 Ω, CL = 35 pF; min: VS1 = VS2 = 3 V; see Figure 15 3
Power Supply Current IDD IDD 0.001 1 μA VDD = +5.5 V; digital inputs = 0 V or 5 V 3
Analog Signal Range 0 V 0 V to VDD (max printed as VDD, not numeric); VDD = +3 V ± 10% 4
On Resistance (RON) RON 5 8 Ω VDD = +3 V ± 10%; typ at +25°C; max at −40°C to +85°C; VS = 0 V to VDD, IS = −10 mA; see Figure 11 4
On Resistance Match Between Channels (ΔRON) ΔRON 0.1 0.3 Ω VDD = +3 V ± 10%; VS = 0 V to VDD, IS = −10 mA 4
Source Off Leakage IS(Off) IS (Off) -0.1 0.01 0.1 nA VDD = +3.3 V; +25°C column; VS = 3 V/1 V, VD = 1 V/3 V; see Figure 12 4
Source Off Leakage IS(Off) IS (Off) -0.2 0.2 nA VDD = +3.3 V; −40°C to +85°C column; VS = 3 V/1 V, VD = 1 V/3 V; see Figure 12 4
Drain Off Leakage ID(Off) ID (Off) -0.1 0.01 0.1 nA VDD = +3.3 V; +25°C column; VS = 3 V/1 V, VD = 1 V/3 V; see Figure 12 4
Drain Off Leakage ID(Off) ID (Off) -0.2 0.2 nA VDD = +3.3 V; −40°C to +85°C column; VS = 3 V/1 V, VD = 1 V/3 V; see Figure 12 4
Channel On Leakage ID, IS(On) ID, IS (On) -0.1 0.01 0.1 nA VDD = +3.3 V; +25°C column; VS = VD = 1 V, or 3 V; see Figure 13 4
Channel On Leakage ID, IS(On) ID, IS (On) -0.2 0.2 nA VDD = +3.3 V; −40°C to +85°C column; VS = VD = 1 V, or 3 V; see Figure 13 4
Input High Voltage VINH 2 V VDD = +3.3 V 4
Input Low Voltage VINL 0.4 V VDD = +3.3 V 4
Input Current IINL or IINH -0.1 0.005 0.1 μA VIN = VINL or VINH 4
Turn-On Time tON tON 13 20 ns typ: RL = 300 Ω, CL = 35 pF; max: VS = 2 V; see Figure 14 4
Turn-Off Time tOFF tOFF 7 12 ns typ: RL = 300 Ω, CL = 35 pF; max: VS = 2 V; see Figure 14 4
Break-Before-Make Time Delay tD (ADG713 only) tD 1 7 ns typ: RL = 300 Ω, CL = 35 pF; min: VS1 = VS2 = 2 V; see Figure 15 4
Power Supply Current IDD IDD 0.001 1 μA VDD = +3.3 V; digital inputs = 0 V or 3 V 4
VDD to GND VDD -0.3 6 V 5
Analog, Digital Inputs -0.3 V Max printed as VDD + 0.3 V or 30 mA, whichever occurs first 5
Continuous Current, S or D 30 mA 5
Peak Current, S or D 100 mA Pulsed at 1 ms, 10% duty cycle maximum 5
Operating Temperature Range -40 85 °C 5
Storage Temperature Range -65 150 °C 5
Junction Temperature 150 °C 5
TSSOP Package Power Dissipation 430 mW TSSOP package (RU-16) 5
Lead Temperature, Vapor Phase (60 sec) 215 °C 5
Lead Temperature, Infrared (15 sec) 220 °C 5
Time at Peak Temperature (Pb-Free Reflow) 20 40 s 5
ESD 2 kV 5
Supply Voltage VDD (single supply) VDD 1.8 5.5 V Single supply range as stated in Features and General Description 1
θJA Thermal Impedance (TSSOP) θJA 150 °C/W TSSOP package 5
θJC Thermal Impedance (TSSOP) θJC 27 °C/W TSSOP package 5

CAD (KiCad official)

  • Symbol: ADG713BRUZ-REEL7
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adg713bruz-reel7-etched.step / adg713bruz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg713bruz-reel7.step / adg713bruz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 b5022be4a77306c2, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF