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ADG708BRUZ-REEL

Analog Devices · Signal Switches, Multiplexers, Decoders · TSSOP-16

ADG708BRUZ-REEL from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Digital input that sets the switch configuration per the ADG708 truth table (Table 7); the device has TTL/CMOS-compatible inputs.
2 EN input Active-high digital enable; when EN is low, all channels are switched off.
3 VSS power_in Most negative power supply pin in dual-supply applications; for single-supply operation it should be tied to GND.
4 S1 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
5 S2 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
6 S3 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
7 S4 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
8 D passive Common drain terminal that can be an input or output; it is the common output of the 8-to-1 multiplexer.
9 S8 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
10 S7 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
11 S6 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
12 S5 passive Source terminal that can be an input or output; the analog signal range is 0 V to VDD in single supply or VSS to VDD in dual supply.
13 VDD power_in Most positive power supply pin; the datasheet gives an absolute maximum VDD to VSS of 7 V.
14 GND power_in Ground (0 V) reference pin.
15 A2 input Digital input that sets the switch configuration per the ADG708 truth table (Table 7); the device has TTL/CMOS-compatible inputs.
16 A1 input Digital input that sets the switch configuration per the ADG708 truth table (Table 7); the device has TTL/CMOS-compatible inputs.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On Resistance (RON), VS = 0 V to VDD RON 3 4.5 Ω VS = 0 V to VDD, IDS = 10 mA; see Figure 20; +25°C 3
On Resistance (RON), VS = 0 V to VDD RON 3 5 Ω VS = 0 V to VDD, IDS = 10 mA; see Figure 20; −40°C to +85°C 3
On Resistance (RON), VS = 0 V to VDD RON 3 7 Ω VS = 0 V to VDD, IDS = 10 mA; see Figure 20; −40°C to +125°C 3
On Resistance Match Between Channels ΔRON 0.4 0.8 Ω VS = 0 V to VDD, IDS = 10 mA; +25°C 3
On Resistance Match Between Channels ΔRON 0.4 1.5 Ω VS = 0 V to VDD, IDS = 10 mA; −40°C to +85°C 3
On Resistance Flatness RFLAT(ON) 0.75 1.2 Ω VS = 0 V to VDD, IDS = 10 mA; +25°C 3
On Resistance Flatness RFLAT(ON) 0.75 1.65 Ω VS = 0 V to VDD, IDS = 10 mA; −40°C to +85°C 3
Source Off Leakage IS (Off) -20 0.01 20 nA VDD = 5.5 V; VD = 4.5 V/1 V, VS = 1 V/4.5 V; see Figure 21; +25°C 3
Drain Off Leakage ID (Off) -20 0.01 20 nA VDD = 5.5 V; VD = 4.5 V/1 V, VS = 1 V/4.5 V; see Figure 22; +25°C 3
Channel On Leakage ID, IS (On) -20 0.01 20 nA VDD = 5.5 V; VD = VS = 1 V or 4.5 V; see Figure 23; +25°C 3
Input High Voltage VINH 2.4 V 3
Input Low Voltage VINL 0.8 V 3
Input Current IINL or IINH -0.1 0.005 0.1 μA VIN = VINL or VINH 3
Switching Time tTRANSITION tTRANSITION 25 ns VS1 = 3 V/0 V, VS8 = 0 V/3 V; +25°C 3
Break-Before-Make Time Delay tOPEN 1 ns VS = 3 V; see Figure 25; +25°C 3
Enable Delay tON (EN) tON (EN) 25 ns VS = 3 V; see Figure 26; +25°C 3
Enable Delay tOFF (EN) tOFF (EN) 12 ns VS = 3 V; see Figure 26; +25°C 3
Supply Current IDD IDD 0.001 1 μA VDD = 5.5 V; digital inputs = 0 V or 5.5 V; +25°C 3
VDD to VSS 7 V 9
VDD to GND -0.3 7 V 9
VSS to GND -3.5 0.3 V 9
Peak Current, S or D 100 mA Pulsed at 1 ms, 10% duty cycle maximum 9
Continuous Current, S or D 30 mA 9
Operating Temperature (Industrial Temperature Range) -40 125 °C Industrial temperature range 9
Storage Temperature Range -65 150 °C 9
Junction Temperature 150 °C 9
TSSOP Package Power Dissipation 432 mW TSSOP package 9
θJA Thermal Impedance θJA 150.4 °C/W 9
θJC Thermal Impedance θJC 27.6 °C/W 9
Lead Temperature, Soldering Vapor Phase 215 °C Vapor phase (60 sec) 9
Lead Temperature, Soldering Infrared 220 °C Infrared (15 sec) 9

CAD (KiCad official)

  • Symbol: ADG708BRUZ-REEL
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adg708bruz-reel-etched.step / adg708bruz-reel-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg708bruz-reel.step / adg708bruz-reel.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 00fb5c9a08eac4a3, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF