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ADG609BRZ-REEL
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Analog Devices Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownADG609BRZ-REEL
Analog Devices · Analog Switches, Multiplexers · SOIC-16
ADG609BRZ-REEL from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address bit 0 selects one of the four differential channel pairs (Table II); it is TTL compatible with VINL 0.8 V max, VINH 2.4 V min, and input current ±1 µA max at VIN = 0 or VDD. |
| 2 | EN | input | Enable input; when low (0) all channels are switched OFF, and it is TTL compatible with VINL 0.8 V max, VINH 2.4 V min, and input current ±1 µA max. |
| 3 | VSS | power_in | Most negative power supply potential in dual supply operation, which may be connected to ground in single supply applications; VSS to GND is limited to +0.3 V to -6.5 V and VDD to VSS to +13 V max. |
| 4 | S1A | passive | Channel 1A analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 5 | S2A | passive | Channel 2A analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 6 | S3A | passive | Channel 3A analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 7 | S4A | passive | Channel 4A analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 8 | DA | passive | Common differential output for channel A, connected to S1A-S4A as selected by A0 and A1; the analog signal range is VSS to VDD with a 20 mA continuous current limit. |
| 9 | DB | passive | Common differential output for channel B, connected to S1B-S4B as selected by A0 and A1; the analog signal range is VSS to VDD with a 20 mA continuous current limit. |
| 10 | S4B | passive | Channel 4B analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 11 | S3B | passive | Channel 3B analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 12 | S2B | passive | Channel 2B analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 13 | S1B | passive | Channel 1B analog terminal; the analog signal range is VSS to VDD, with 20 mA continuous and 40 mA peak (1 ms pulse, 10% duty cycle max) current limits. |
| 14 | VDD | power_in | Most positive power supply potential; VDD to GND is limited to -0.3 V to +6.5 V, and digital inputs may go to VDD + 2 V or 20 mA, whichever occurs first. |
| 15 | GND | power_in | Ground (0 V) reference for the device. |
| 16 | A1 | input | Address bit 1 selects one of the four differential channel pairs (Table II); it is TTL compatible with VINL 0.8 V max, VINH 2.4 V min, and input current ±1 µA max at VIN = 0 or VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| On resistance, ±5 V supply (B range) | RON | 35 | Ω | −3.5 V < VS < +3.5 V, IS = −1 mA; VDD = +4.5 V, VSS = −4.5 V; Test Circuit 1 | 2 | ||
| On resistance flatness, ±5 V supply (B range) | ΔRON | 6 | Ω | −3 V < VS < +3 V, IDS = −1 mA; VDD = +5 V, VSS = −5 V | 2 | ||
| RON match, ±5 V supply (B range) | RON Match | 3 | Ω | VS = 0 V, IDS = −1 mA; VDD = +5 V, VSS = −5 V | 2 | ||
| Source OFF leakage, ±5 V supply (B range) | IS (OFF) | -2 | 2 | nA | VD = ±4.5 V, VS = 74.5 V; Test Circuit 2 | 2 | |
| Drain OFF leakage ADG609, ±5 V supply (B range) | ID (OFF) | -1 | 1 | nA | VD = ±4.5 V, VS = 74.5 V; Test Circuit 3 | 2 | |
| Channel ON leakage ADG609, ±5 V supply (B range) | ID, IS (ON) | -1.5 | 1.5 | nA | VS = VD = ±4.5 V; Test Circuit 4 | 2 | |
| Positive supply current, ±5 V supply (B range) | IDD | 2 | µA | VIN = 0 V or VDD | 2 | ||
| Negative supply current, ±5 V supply (B range) | ISS | 1 | µA | 2 | |||
| Switching time, ±5 V supply (B range) | tTRANSITION | 90 | ns | RL = 300 Ω, CL = 35 pF; VS1 = ±3.5 V, VS8 = 73.5 V; Test Circuit 5 | 2 | ||
| Break-before-make delay, ±5 V supply | tOPEN | 10 | ns | RL = 300 Ω, CL = 35 pF; VS = +3.5 V; Test Circuit 6 | 2 | ||
| Enable turn-on time, ±5 V supply (B range) | tON (EN) | 90 | ns | RL = 300 Ω, CL = 35 pF; VS = +3.5 V; Test Circuit 7 | 2 | ||
| Enable turn-off time, ±5 V supply (B range) | tOFF (EN) | 60 | ns | RL = 300 Ω, CL = 35 pF; VS = +3.5 V; Test Circuit 7 | 2 | ||
| Input high voltage | VINH | 2.4 | V | 2 | |||
| Input low voltage | VINL | 0.8 | V | 2 | |||
| Digital input current | IINL or IINH | -1 | 1 | µA | VIN = 0 or VDD | 2 | |
| On resistance, single +5 V supply (B range) | RON | 60 | Ω | VS = +3.5 V, IS = −1 mA; VDD = +4.5 V; Test Circuit 1 | 3 | ||
| On resistance flatness, single +5 V supply (B range) | ΔRON | 6 | Ω | +1 V < VS < +3 V, IDS = −1 mA; VDD = +5 V | 3 | ||
| RON match, single +5 V supply (B range) | RON Match | 3 | Ω | VS = 0 V, IDS = −1 mA; VDD = +5 V | 3 | ||
| Source OFF leakage, single +5 V supply (B range) | IS (OFF) | -2 | 2 | nA | VD = 4.5 V/0.1 V, VS = 0.1 V/4.5 V; Test Circuit 2 | 3 | |
| Drain OFF leakage ADG609, single +5 V supply (B range) | ID (OFF) | -1 | 1 | nA | VD = 4.5 V/0.1 V, VS = 0.1 V/4.5 V; Test Circuit 3 | 3 | |
| Channel ON leakage ADG609, single +5 V supply (B range) | ID, IS (ON) | -1.5 | 1.5 | nA | VS = VD = 4.5 V/0.1 V; Test Circuit 4 | 3 | |
| Switching time, single +5 V supply (B range) | tTRANSITION | 130 | ns | RL = 300 Ω, CL = 35 pF; VS1 = 3.5 V/0 V, VS8 = 0 V/3.5 V; Test Circuit 5 | 3 | ||
| Enable turn-on time, single +5 V supply (B range) | tON (EN) | 130 | ns | RL = 300 Ω, CL = 35 pF; VS = +3.5 V; Test Circuit 7 | 3 | ||
| Enable turn-off time, single +5 V supply (B range) | tOFF (EN) | 60 | ns | RL = 300 Ω, CL = 35 pF; VS = +3.5 V; Test Circuit 7 | 3 | ||
| Charge injection, single +5 V supply | Q | 3 | pC | VS = 0 V, RS = 0 Ω, CL = 1 nF; Test Circuit 8 | 3 | ||
| Positive supply current, single +5 V supply (B range) | IDD | 2 | µA | VIN = 0 V or VDD | 3 | ||
| On resistance, single +3.3 V supply (B range) | RON | 100 | Ω | VS = +1.5 V, IS = −1 mA; VDD = +3 V; Test Circuit 1 | 4 | ||
| RON match, single +3.3 V supply (B range) | RON Match | 3 | Ω | VS = 0 V, IDS = −1 mA, VDD = +3.3 V | 4 | ||
| Source OFF leakage, single +3.3 V supply (B range) | IS (OFF) | -2 | 2 | nA | VD = 2.6 V/0.1 V, VS = 0.1 V/2.6 V; Test Circuit 2 | 4 | |
| Drain OFF leakage ADG609, single +3.3 V supply (B range) | ID (OFF) | -1 | 1 | nA | VD = 2.6 V/0.1 V, VS = 0.1 V/2.6 V; Test Circuit 3 | 4 | |
| Channel ON leakage ADG609, single +3.3 V supply (B range) | ID, IS (ON) | -1.5 | 1.5 | nA | VS = VD = 2.6 V/0.1 V; Test Circuit 4 | 4 | |
| Switching time, single +3.3 V supply (B range) | tTRANSITION | 225 | ns | RL = 300 Ω, CL = 35 pF; VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V; Test Circuit 5 | 4 | ||
| Enable turn-on time, single +3.3 V supply (B range) | tON (EN) | 225 | ns | RL = 300 Ω, CL = 35 pF; VS = +1.5 V; Test Circuit 7 | 4 | ||
| Enable turn-off time, single +3.3 V supply (B range) | tOFF (EN) | 75 | ns | RL = 300 Ω, CL = 35 pF; VS = +1.5 V; Test Circuit 7 | 4 | ||
| Charge injection, single +3.3 V supply | Q | 3 | pC | VS = 0 V, RS = 0 Ω, CL = 1 nF; Test Circuit 8 | 4 | ||
| Positive supply current, single +3.3 V supply (B range) | IDD | 2 | µA | VIN = 0 V or VDD | 4 | ||
| Operating temperature range, B version | TA | -40 | 85 | °C | Industrial (B version) | 5 | |
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| Junction temperature | TJ | 150 | °C | 5 | |||
| VDD to VSS | VDD − VSS | 13 | V | 5 | |||
| VDD to GND | VDD − GND | -0.3 | 6.5 | V | 5 | ||
| VSS to GND | VSS − GND | -6.5 | 0.3 | V | 5 | ||
| Analog and digital input voltage | VA, VIN | -0.3 | V | Maximum VDD + 2 V, or 20 mA, whichever occurs first | 5 | ||
| Continuous current, S or D | IS, ID | 20 | mA | 5 | |||
| Peak current, S or D | IS, ID (peak) | 40 | mA | Pulsed at 1 ms, 10% duty cycle max | 5 | ||
| Lead temperature, soldering vapor phase (60 s), SOIC | 215 | °C | SOIC package, vapor phase 60 s | 5 | |||
| Lead temperature, soldering infrared (15 s), SOIC | 220 | °C | SOIC package, infrared 15 s | 5 | |||
| ESD rating | ESD | 5000 | V | 5 | |||
| Thermal impedance, junction-to-ambient, SOIC | θJA | 77 | °C/W | SOIC package | 5 |
CAD (KiCad official)
- Symbol:
ADG609BRZ-REEL - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
adg609brz-reel-etched.step/adg609brz-reel-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adg609brz-reel.step/adg609brz-reel.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
76832240258a28e0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).