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ADG508FBRNZ-REEL7

Analog Devices · Analog Switches, Multiplexers · SOIC-16

ADG508FBRNZ-REEL7 from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Logic control input that, with A1 and A2, selects which of the eight channels is on when EN is high.
2 EN input Active high digital enable input; when low the device is disabled and all switches are off, and when high the Ax inputs determine which switch is on.
3 VSS power_in Most negative power supply potential; in single-supply applications this pin can be connected to ground.
4 S1 bidirectional Source terminal 1, which can be an input or an output.
5 S2 bidirectional Source terminal 2, which can be an input or an output.
6 S3 bidirectional Source terminal 3, which can be an input or an output.
7 S4 bidirectional Source terminal 4, which can be an input or an output.
8 D bidirectional Drain terminal, which can be an input or an output.
9 S8 bidirectional Source terminal 8, which can be an input or an output.
10 S7 bidirectional Source terminal 7, which can be an input or an output.
11 S6 bidirectional Source terminal 6, which can be an input or an output.
12 S5 bidirectional Source terminal 5, which can be an input or an output.
13 VDD power_in Most positive power supply potential.
14 GND power_in Ground (0 V) reference.
15 A2 input Logic control input that, with A0 and A1, selects which of the eight channels is on when EN is high.
16 A1 input Logic control input that, with A0 and A2, selects which of the eight channels is on when EN is high.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On-resistance RON (max, dual supply, over temperature column) RON 270 390 Ω −10 V ≤ VS ≤ +10 V, IS = 1 mA; VDD = +15 V ± 10%, VSS = −15 V ± 10%; See Figure 21 3
On-resistance match between channels ΔRON 3 % VS = ±10 V, IS = −1 mA 3
Source off leakage IS(Off), +25°C IS (Off) -1 0.02 1 nA +25°C; VD = ±10 V, VS = +10 V; See Figure 22 3
Source off leakage IS(Off), −40°C to +85°C IS (Off) -50 50 nA −40°C to +85°C; VD = ±10 V, VS = +10 V; See Figure 22 3
Drain off leakage ID(Off) ADG508F, +25°C ID (Off) -1 0.04 1 nA +25°C; VD = ±10 V, VS = +10 V; See Figure 23 3
Drain off leakage ID(Off) ADG508F, −40°C to +85°C ID (Off) -60 60 nA −40°C to +85°C; VD = ±10 V, VS = +10 V; See Figure 23 3
Channel on leakage ID, IS(On) ADG508F, +25°C ID, IS (On) -1 0.04 1 nA +25°C; VS = VD = ±10 V; See Figure 24 3
Channel on leakage ID, IS(On) ADG508F, −40°C to +85°C ID, IS (On) -60 60 nA −40°C to +85°C; VS = VD = ±10 V; See Figure 24 3
Source leakage current IS(Fault) with overvoltage IS (Fault) -2 0.02 2 μA VS = +55 V or −40 V, VD = 0 V; see Figure 25 (typ 0.02 nA) 3
Input high voltage VINH 2.4 V 3
Input low voltage VINL 0.8 V 3
Input current IINL or IINH -1 1 μA VIN = 0 or VDD 3
Switching time tTRANSITION, +25°C tTRANSITION 175 220 ns RL = 1 MΩ, CL = 35 pF; VS1 = ±10 V, VS8 = +10 V; see Figure 27 3
Switching time tTRANSITION, −40°C to +85°C tTRANSITION 300 ns RL = 1 MΩ, CL = 35 pF; VS1 = ±10 V, VS8 = +10 V; see Figure 27 3
Break-before-make time tOPEN, +25°C tOPEN 60 90 ns RL = 1 kΩ, CL = 35 pF; VS = 5 V; see Figure 28 3
Break-before-make time tOPEN, −40°C to +85°C tOPEN 40 ns RL = 1 kΩ, CL = 35 pF; VS = 5 V; see Figure 28 3
Enable delay tON(EN), +25°C tON (EN) 180 230 ns RL = 1 kΩ, CL = 35 pF; VS = 5 V; see Figure 29 3
Enable delay tON(EN), −40°C to +85°C tON (EN) 300 ns RL = 1 kΩ, CL = 35 pF; VS = 5 V; see Figure 29 3
Enable delay tOFF(EN), +25°C tOFF (EN) 100 130 ns RL = 1 kΩ, CL = 35 pF 3
Enable delay tOFF(EN), −40°C to +85°C tOFF (EN) 150 ns RL = 1 kΩ, CL = 35 pF 3
Positive supply current IDD IDD 0.05 0.2 mA VIN = 0 V or 5 V 4
Negative supply current ISS ISS 0.1 1 μA 4
VDD to VSS VDD − VSS 48 V TA = 25°C unless otherwise noted 5
VDD to GND VDD − GND -0.3 48 V TA = 25°C unless otherwise noted 5
VSS to GND VSS − GND -48 0.3 V TA = 25°C unless otherwise noted 5
Digital input, EN, Ax -0.3 V Upper limit VDD + 0.3 V or 20 mA, whichever occurs first 5
Analog input overvoltage with power on VS -25 40 V VDD = +15 V, VSS = −15 V; printed as VSS − 25 V to VDD + 40 V 5
Analog input overvoltage with power off VS -40 55 V VDD = 0 V, VSS = 0 V 5
Continuous current, S or D 20 mA 5
Peak current, S or D 40 mA Pulsed at 1 ms, 10% duty cycle max 5
Operating temperature range (B version) TA -40 85 °C Industrial (B Version) 5
Storage temperature range TSTG -65 150 °C 5
Junction temperature TJ 150 °C 5
Thermal impedance, SOIC narrow body (R-16) θJA 77 °C/W 16-lead SOIC narrow body 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing Abs Wide Body 75°C/W Stresses above those listed under Absolute Maximum Ratings 5

CAD (KiCad official)

  • Symbol: ADG508FBRNZ-REEL7
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: adg508fbrnz-reel7-etched.step / adg508fbrnz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg508fbrnz-reel7.step / adg508fbrnz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 2368cb63d1d2e8c2, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF