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ADG508AKRZ-REEL7
Public Made by Adomby adom
Analog Devices Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADG508AKRZ-REEL7
Analog Devices · Analog Switches, Multiplexers · SOIC-16
ADG508AKRZ-REEL7 from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Logic control input (address bit 0) for selecting the ADG508A channel; TTL and 5 V CMOS compatible, with VINH min 2.4 V and VINL max 0.8 V. |
| 2 | EN | input | Active-high digital enable: when low, the device is disabled and all switches are off; when high, the Ax inputs select the on switch. |
| 3 | VSS | power_in | Most negative power supply potential in dual-supply applications; in single-supply applications it can be connected to ground, with VDD to VSS maximum rating of 44 V. |
| 4 | S1 | passive | Source terminal 1, can be an input or an output; analog signal range is VSS to VDD. |
| 5 | S2 | passive | Source terminal 2, can be an input or an output; analog signal range is VSS to VDD. |
| 6 | S3 | passive | Source terminal 3, can be an input or an output; analog signal range is VSS to VDD. |
| 7 | S4 | passive | Source terminal 4, can be an input or an output; analog signal range is VSS to VDD. |
| 8 | D | passive | Drain terminal (common output/input of the multiplexer), can be an input or an output; analog signal range is VSS to VDD. |
| 9 | S8 | passive | Source terminal 8, can be an input or an output; analog signal range is VSS to VDD. |
| 10 | S7 | passive | Source terminal 7, can be an input or an output; analog signal range is VSS to VDD. |
| 11 | S6 | passive | Source terminal 6, can be an input or an output; analog signal range is VSS to VDD. |
| 12 | S5 | passive | Source terminal 5, can be an input or an output; analog signal range is VSS to VDD. |
| 13 | VDD | power_in | Most positive power supply potential; the device operates from 10.8 V to 16.5 V single or dual supply, with VDD to GND maximum of 32 V. |
| 14 | GND | power_in | Ground (0 V) reference for the device. |
| 15 | A2 | input | Logic control input (address bit 2) for selecting the ADG508A channel; TTL and 5 V CMOS compatible. |
| 16 | A1 | input | Logic control input (address bit 1) for selecting the ADG508A channel; TTL and 5 V CMOS compatible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RON (+25°C), dual supply | RON | 450 | Ω | Dual supply; −10 V ≤ VS ≤ +10 V, IDS = 1 mA; see Figure 14 | 3 | ||
| RON (−40°C to +85°C), dual supply | RON | 600 | Ω | Dual supply; −10 V ≤ VS ≤ +10 V, IDS = 1 mA; see Figure 14 | 3 | ||
| RON (+25°C), VDD = 15 V (±10%), VSS = −15 V (±10%) | RON | 300 | Ω | Dual supply; VDD = 15 V (±10%), VSS = −15 V (±10%) | 3 | ||
| RON (−40°C to +85°C), VDD = 15 V (±10%), VSS = −15 V (±10%) | RON | 400 | Ω | Dual supply; VDD = 15 V (±10%), VSS = −15 V (±10%) | 3 | ||
| IS (Off) off input leakage (+25°C) | IS (Off) | 1 | nA | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 15 | 3 | ||
| IS (Off) off input leakage (−40°C to +85°C) | IS (Off) | 50 | nA | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 15 | 3 | ||
| ID (Off) off output leakage, ADG508A (+25°C) | ID (Off) | 1 | nA | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 16 | 3 | ||
| ID (Off) off output leakage, ADG508A (−40°C to +85°C) | ID (Off) | 100 | nA | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 16 | 3 | ||
| ID (On) on channel leakage, ADG508A (+25°C) | ID (On) | 1 | nA | Dual supply; V1 = V2 = ±10 V; see Figure 17 | 3 | ||
| ID (On) on channel leakage, ADG508A (−40°C to +85°C) | ID (On) | 100 | nA | Dual supply; V1 = V2 = ±10 V; see Figure 17 | 3 | ||
| Input High Voltage | VINH | 2.4 | V | 3 | |||
| Input Low Voltage | VINL | 0.8 | V | 3 | |||
| Input leakage current | IINL or IINH | 1 | μA | VIN = 0 to VDD | 3 | ||
| Digital input capacitance | CIN | 8 | pF | 3 | |||
| Switching time tTRANSITION (+25°C) | tTRANSITION | 300 | ns | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 19 | 3 | ||
| Switching time tTRANSITION (−40°C to +85°C) | tTRANSITION | 400 | ns | Dual supply; V1 = ±10 V, V2 = 10 V; see Figure 19 | 3 | ||
| Break-before-make delay tOPEN (+25°C) | tOPEN | 25 | ns | Dual supply; see Figure 20 | 3 | ||
| Break-before-make delay tOPEN (−40°C to +85°C) | tOPEN | 10 | ns | Dual supply; see Figure 20 | 3 | ||
| Enable delay tON (EN) (+25°C) | tON (EN) | 300 | ns | Dual supply; see Figure 21 | 3 | ||
| Enable delay tON (EN) (−40°C to +85°C) | tON (EN) | 400 | ns | Dual supply; see Figure 21 | 3 | ||
| Enable delay tOFF (EN) (+25°C) | tOFF (EN) | 300 | ns | Dual supply; see Figure 21 | 3 | ||
| Enable delay tOFF (EN) (−40°C to +85°C) | tOFF (EN) | 400 | ns | Dual supply; see Figure 21 | 3 | ||
| Off Isolation | 50 | dB | Dual supply; VEN = 0.8 V, RL = 1 kΩ, CL = 15 pF, VS = 7 V rms, f = 100 kHz | 3 | |||
| Power supply current IDD | IDD | 1.5 | mA | Dual supply; VIN = VINL or VINH | 4 | ||
| Power supply current ISS | ISS | 0.2 | mA | Dual supply; VIN = VINL or VINH | 4 | ||
| Power Dissipation | 28 | mW | Dual supply | 4 | |||
| RON (+25°C), single supply | RON | 700 | Ω | Single supply; GND ≤ VS ≤ 10 V, IDS = 0.5 mA; see Figure 14 | 5 | ||
| RON (−40°C to +85°C), single supply | RON | 1000 | Ω | Single supply; GND ≤ VS ≤ 10 V, IDS = 0.5 mA; see Figure 14 | 5 | ||
| IS (Off) off input leakage (+25°C), single supply | IS (Off) | 1 | nA | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 15 | 5 | ||
| IS (Off) off input leakage (−40°C to +85°C), single supply | IS (Off) | 50 | nA | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 15 | 5 | ||
| ID (Off) off output leakage, ADG508A (+25°C), single supply | ID (Off) | 1 | nA | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 16 | 5 | ||
| ID (Off) off output leakage, ADG508A (−40°C to +85°C), single supply | ID (Off) | 100 | nA | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 16 | 5 | ||
| ID (On) on channel leakage, ADG508A (+25°C), single supply | ID (On) | 1 | nA | Single supply; V1 = V2 = 10 V/GND; see Figure 17 | 5 | ||
| ID (On) on channel leakage, ADG508A (−40°C to +85°C), single supply | ID (On) | 100 | nA | Single supply; V1 = V2 = 10 V/GND; see Figure 17 | 5 | ||
| Input High Voltage, single supply | VINH | 2.4 | V | Single supply | 5 | ||
| Input Low Voltage, single supply | VINL | 0.8 | V | Single supply | 5 | ||
| Input leakage current, single supply | IINL or IINH | 1 | μA | Single supply; VIN = 0 to VDD | 5 | ||
| Digital input capacitance, single supply | CIN | 8 | pF | Single supply | 5 | ||
| Switching time tTRANSITION (+25°C), single supply | tTRANSITION | 450 | ns | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 19 | 5 | ||
| Switching time tTRANSITION (−40°C to +85°C), single supply | tTRANSITION | 600 | ns | Single supply; V1 = 10 V/GND, V2 = GND/10 V; see Figure 19 | 5 | ||
| Break-before-make delay tOPEN (+25°C), single supply | tOPEN | 25 | ns | Single supply; see Figure 20 | 5 | ||
| Break-before-make delay tOPEN (−40°C to +85°C), single supply | tOPEN | 10 | ns | Single supply; see Figure 20 | 5 | ||
| Enable delay tON (EN) (+25°C), single supply | tON (EN) | 450 | ns | Single supply; see Figure 21 | 5 | ||
| Enable delay tON (EN) (−40°C to +85°C), single supply | tON (EN) | 600 | ns | Single supply; see Figure 21 | 5 | ||
| Enable delay tOFF (EN) (+25°C), single supply | tOFF (EN) | 450 | ns | Single supply; see Figure 21 | 5 | ||
| Enable delay tOFF (EN) (−40°C to +85°C), single supply | tOFF (EN) | 600 | ns | Single supply; see Figure 21 | 5 | ||
| Off Isolation, single supply | 50 | dB | Single supply; VEN = 0.8 V, RL = 1kΩ, CL = 15 pF, VS = 3.5 V rms, f = 100 kHz | 5 | |||
| Power supply current IDD, single supply | IDD | 1.5 | mA | Single supply; VIN = VINL or VINH | 6 | ||
| Power Dissipation, single supply | 25 | mW | Single supply | 6 | |||
| Supply voltage VDD (specified range, single or dual supply) | VDD | 10.8 | 16.5 | V | Specified for single and dual supplies, VDD = 10.8 V to 16.5 V | 3 | |
| VDD to VSS | 44 | V | 7 | ||||
| VDD to GND | 32 | V | 7 | ||||
| VSS to GND | -32 | V | 7 | ||||
| Continuous current, S or D | 20 | mA | 7 | ||||
| Pulsed current, S or D | 40 | mA | 1 ms Duration, 10% Duty Cycle | 7 | |||
| Power dissipation (any package) | 470 | mW | Up to 75°C | 7 | |||
| Operating temperature, Commercial (K Version) | -40 | 85 | °C | K version | 7 | ||
| Storage temperature range | -65 | 150 | °C | 7 |
CAD (KiCad official)
- Symbol:
ADG508AKRZ-REEL7 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
adg508akrz-reel7-etched.step/adg508akrz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adg508akrz-reel7.step/adg508akrz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
7e3f7bcc170aaf43, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).