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ADG419BRZ-REEL7

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Analog Devices Analog Switches, Multiplexers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADG419BRZ-REEL7

Analog Devices · Analog Switches, Multiplexers · SOIC-8

ADG419BRZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D bidirectional Drain terminal that may be an input or an output of the analog switch.
2 S1 bidirectional Source terminal that may be an input or an output; S1 conducts to D when Logic is 0.
3 GND power_in Ground (0 V) reference; GND to VDD is limited to −0.3 V to +25 V and VSS to GND to +0.3 V to −25 V in the absolute maximum ratings.
4 VDD power_in Most positive power supply potential; VDD to VSS is rated at 44 V maximum and VDD to GND at −0.3 V to +25 V.
5 VL power_in Logic power supply (5 V), with VL to GND rated at −0.3 V to VDD + 0.3 V.
6 IN input Logic control input that selects the switch state; VINL maximum is 0.8 V and VINH minimum is 2.4 V, with analog/digital inputs rated VSS − 2 V to VDD + 2 V.
7 VSS power_in Most negative power supply potential in dual-supply applications, which may be connected to GND in single-supply applications.
8 S2 bidirectional Source terminal that may be an input or an output; S2 conducts to D when Logic is 1.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
RON, dual supply, B version, +25°C RON 35 Ω VDD = +13.5 V, VSS = −13.5 V 3
RON, dual supply, B version, −40°C to +125°C RON 45 Ω VDD = +13.5 V, VSS = −13.5 V 3
Source off leakage, dual supply, B version, +25°C IS (Off) -0.25 0.25 nA VD = ±15.5 V, VS = −15.5 V; see Figure 12 3
Source off leakage, dual supply, B version, −40°C to +125°C IS (Off) -15 15 nA VD = ±15.5 V, VS = −15.5 V; see Figure 12 3
Drain off leakage, dual supply, B version, +25°C ID (Off) -0.75 0.75 nA VD = ±15.5 V, VS = −15.5 V; see Figure 12 3
Drain off leakage, dual supply, B version, −40°C to +125°C ID (Off) -30 30 nA VD = ±15.5 V, VS = −15.5 V; see Figure 12 3
Channel on leakage, dual supply, B version, +25°C ID, IS (On) -0.75 0.75 nA VS = VD = ±15.5 V; see Figure 13 3
Channel on leakage, dual supply, B version, −40°C to +125°C ID, IS (On) -30 30 nA VS = VD = ±15.5 V; see Figure 13 3
Input high voltage (all temperatures) VINH 2.4 V 3
Input low voltage (all temperatures) VINL 0.8 V 3
Input current IINL or IINH (all temperatures) IINL or IINH -0.5 0.5 μA VIN = VINL or VINH 3
Transition time, dual supply, B version, +25°C tTRANSITION 160 ns RL = 300 Ω, CL = 35 pF; VS1 = ±10 V, VS2 = ∓10 V; see Figure 14 3
Transition time, dual supply, B version, −40°C to +125°C tTRANSITION 200 ns RL = 300 Ω, CL = 35 pF; VS1 = ±10 V, VS2 = ∓10 V; see Figure 14 3
Break-before-make time delay, dual supply, 25°C tD 5 ns RL = 300 Ω, CL = 35 pF; VS1 = VS2 = ±10 V; see Figure 15 3
Supply current IDD, dual supply, B version, +25°C IDD 1 μA VIN = 0 V or 5 V 3
Supply current IDD, dual supply, B version, −40°C to +125°C IDD 2.5 μA VIN = 0 V or 5 V 3
Negative supply current ISS, dual supply, B version, +25°C ISS 1 μA 3
Negative supply current ISS, dual supply, B version, −40°C to +125°C ISS 2.5 μA 3
Logic supply current IL, dual supply, B version, +25°C IL 1 μA VL = 5.5 V 3
Logic supply current IL, dual supply, B version, −40°C to +125°C IL 2.5 μA VL = 5.5 V 3
On resistance, single supply, B version, +25°C RON 60 Ω VDD = 10.8 V 4
On resistance, single supply, B version, −40°C to +125°C RON 70 Ω VDD = 10.8 V 4
Source off leakage, single supply, B version, +25°C IS (Off) -0.25 0.25 nA VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 4
Source off leakage, single supply, B version, −40°C to +125°C IS (Off) -15 15 nA VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 4
Drain off leakage, single supply, B version, +25°C ID (Off) -0.75 0.75 nA VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 4
Drain off leakage, single supply, B version, −40°C to +125°C ID (Off) -30 30 nA VD = 12.2 V/1 V, VS = 1 V/12.2 V; see Figure 12 4
Channel on leakage, single supply, B version, +25°C ID, IS (On) -0.75 0.75 nA VS = VD = 12.2 V/1 V; see Figure 13 4
Channel on leakage, single supply, B version, −40°C to +125°C ID, IS (On) -30 30 nA VS = VD = 12.2 V/1 V; see Figure 13 4
Transition time, single supply, B version, +25°C tTRANSITION 180 ns RL = 300 Ω, CL = 35 pF; VS1 = 0 V/8 V, VS2 = 8 V/0 V; see Figure 14 4
Transition time, single supply, B version, −40°C to +125°C tTRANSITION 250 ns RL = 300 Ω, CL = 35 pF; VS1 = 0 V/8 V, VS2 = 8 V/0 V; see Figure 14 4
Supply current IDD, single supply, B version, +25°C IDD 1 μA VIN = 0 V or 5 V 4
Supply current IDD, single supply, B version, −40°C to +125°C IDD 2.5 μA VIN = 0 V or 5 V 4
Logic supply current IL, single supply, B version, +25°C IL 1 μA VL = 5.5 V 4
Logic supply current IL, single supply, B version, −40°C to +125°C IL 2.5 μA VL = 5.5 V 4
Maximum voltage VDD to VSS 44 V 5
VDD to GND -0.3 25 V 5
VSS to GND -25 0.3 V 5
Continuous current, S or D 30 mA 5
Peak current, S or D 100 mA Pulsed at 1 ms, 10% Duty-Cycle Maximum 5
Operating temperature range, Industrial (B version) -40 125 °C 5
Storage temperature range -65 150 °C 5
Junction temperature 150 °C 5
SOIC package power dissipation 400 mW SOIC package 5
SOIC package thermal impedance θJA θJA 155 °C/W SOIC package 5
VDD supply, dual-supply test condition VDD 15 V Dual-supply spec condition, ±10% tolerance as printed 3
VSS supply, dual-supply test condition VSS -15 V Dual-supply spec condition, ±10% tolerance as printed 3
VL logic supply, dual-supply test condition VL 5 V Dual-supply spec condition, ±10% tolerance as printed 3
VDD supply, single-supply test condition VDD 12 V Single-supply spec condition, ±10% tolerance as printed 4
VSS supply, single-supply test condition VSS 0 V Single-supply spec condition 4
VL logic supply, single-supply test condition VL 5 V Single-supply spec condition, ±10% tolerance as printed 4
On resistance, dual supply, B version RON 25 Ω VD = ±12.5 V, IS = −10 mA 3
On resistance, single supply, B version RON 40 Ω VD = 3 V, 8.5 V, IS = −10 mA 4
Break-before-make time delay, single supply, B version tD 60 ns RL = 300 Ω, CL = 35 pF; VS1 = VS2 = 8 V; see Figure 15 4
Off isolation, dual supply, B version 80 dB RL = 50 Ω, f = 1 MHz; see Figure 16 3
Channel-to-channel crosstalk, dual supply, B version 90 dB RL = 50 Ω, f = 1 MHz; see Figure 17 3
Off switch source capacitance, dual supply, B version CS (Off) 6 pF f = 1 MHz 3
On switch capacitance, dual supply, B version CD, CS (On) 55 pF f = 1 MHz 3

CAD (KiCad official)

  • Symbol: ADG419BRZ-REEL7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adg419brz-reel7-etched.step / adg419brz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg419brz-reel7.step / adg419brz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 99f7f2e00c10da77, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF