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ADG3304WBRUZ-REEL
Public Made by Adomby adom
Analog Devices Translators / Level Shifters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADG3304WBRUZ-REEL
Analog Devices · Translators / Level Shifters · TSSOP-14
ADG3304WBRUZ-REEL from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCCA | power_in | Power supply voltage input for the A1 to A4 I/O pins, which must satisfy 1.15 V ≤ VCCA ≤ VCCY, with VCCA always less than VCCY for proper operation. |
| 2 | A1 | bidirectional | Input/output A1, referenced to VCCA. |
| 3 | A2 | bidirectional | Input/output A2, referenced to VCCA. |
| 4 | A3 | bidirectional | Input/output A3, referenced to VCCA. |
| 5 | A4 | bidirectional | Input/output A4, referenced to VCCA. |
| 6 | NC | unconnected | No connect pin, listed as NC in the 14-lead TSSOP pin function table. |
| 7 | GND | power_in | Ground reference for the device, with GND specified as 0 V in the test conditions. |
| 8 | EN | input | Active high enable input referenced to VCCA; driving EN low three-states both the A and Y I/O pins, and EN may be driven with VCCA- or VCCY-compatible levels with an absolute maximum of −0.3 V to +7 V to GND. |
| 9 | NC | unconnected | No connect pin, listed as NC in the 14-lead TSSOP pin function table. |
| 10 | Y4 | bidirectional | Input/output Y4, referenced to VCCY. |
| 11 | Y3 | bidirectional | Input/output Y3, referenced to VCCY. |
| 12 | Y2 | bidirectional | Input/output Y2, referenced to VCCY. |
| 13 | Y1 | bidirectional | Input/output Y1, referenced to VCCY. |
| 14 | VCCY | power_in | Power supply voltage input for the Y1 to Y4 I/O pins, which must satisfy 1.65 V ≤ VCCY ≤ 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input High Voltage (A side), VCCA=2.5 V | VIHA | 1.7 | V | VCCA = 2.5 V ± 0.2 V | 3 | ||
| Input High Voltage (A side), VCCA=3.3 V | VIHA | 2.2 | V | VCCA = 3.3 V ± 0.3 V | 3 | ||
| Input Low Voltage (A side), VCCA=2.5 V | VILA | 0.7 | V | VCCA = 2.5 V ± 0.2 V | 3 | ||
| Input Low Voltage (A side), VCCA=3.3 V | VILA | 0.8 | V | VCCA = 3.3 V ± 0.3 V | 3 | ||
| Output Low Voltage (A side) | VOLA | 0.4 | V | VY = 0 V, IOL = 20 µA, see Figure 29 | 3 | ||
| Leakage Current, Hi-Z (A side) | ILA, Hi-Z | -1 | 1 | µA | VA = 0 V/VCCA, EN = 0, see Figure 31 | 3 | |
| Capacitance (A side) | CA | 9 | pF | f = 1 MHz, EN = 0, see Figure 34 | 3 | ||
| Input High Voltage (Y side), VCCY=2.5 V | VIHY | 1.7 | V | VCCY = 2.5 V ± 0.2 V | 3 | ||
| Input High Voltage (Y side), VCCY=3.3 V | VIHY | 2 | V | VCCY = 3.3 V ± 0.3 V | 3 | ||
| Input Low Voltage (Y side), VCCY=2.5 V | VILY | 0.7 | V | VCCY = 2.5 V ± 0.2 V | 3 | ||
| Input Low Voltage (Y side), VCCY=3.3 V | VILY | 0.8 | V | VCCY = 3.3 V ± 0.3 V | 3 | ||
| Output Low Voltage (Y side) | VOLY | 0.4 | V | VA = 0 V, IOL = 20 µA, see Figure 30 | 3 | ||
| Leakage Current, Hi-Z (Y side) | ILY, Hi-Z | -1 | 1 | µA | VY = 0 V/VCCY, EN = 0, see Figure 32 | 3 | |
| Capacitance (Y side) | CY | 6 | pF | f = 1 MHz, EN = 0, see Figure 35 | 3 | ||
| Enable Input High Voltage, VCCA=2.5 V | VIHEN | 1.7 | V | VCCA = 2.5 V ± 0.2 V | 3 | ||
| Enable Input High Voltage, VCCA=3.3 V | VIHEN | 2.2 | V | VCCA = 3.3 V ± 0.3 V | 3 | ||
| Enable Input Low Voltage, VCCA=2.5 V | VILEN | 0.7 | V | VCCA = 2.5 V ± 0.2 V | 3 | ||
| Enable Input Low Voltage, VCCA=3.3 V | VILEN | 0.8 | V | VCCA = 3.3 V ± 0.3 V | 3 | ||
| EN Pin Leakage Current | ILEN | -1 | 1 | µA | VEN = 0 V/VCCA, VA = 0 V, see Figure 33 | 3 | |
| EN Pin Capacitance | CEN | 3 | pF | 3 | |||
| Enable Time | tEN | 1 | 1.8 | µs | RS = RT = 50 Ω, VA = 0 V/VCCA (A→Y), VY = 0 V/VCCY (Y→A), see Figure 36 | 3 | |
| VCCA Power Supply Voltage | VCCA | 1.15 | 5.5 | V | VCCA ≤ VCCY | 5 | |
| VCCY Power Supply Voltage | VCCY | 1.65 | 5.5 | V | 5 | ||
| Quiescent Supply Current (VCCA) | ICCA | 0.17 | 5 | µA | VA = 0 V/VCCA, VY = 0 V/VCCY, VCCA = VCCY = 5.5 V, EN = 1 | 5 | |
| Quiescent Supply Current (VCCY) | ICCY | 0.27 | 5 | µA | VA = 0 V/VCCA, VY = 0 V/VCCY, VCCA = VCCY = 5.5 V, EN = 1 | 5 | |
| Three-State Mode Supply Current (VCCA) | IHi-Z, A | 0.1 | 5 | µA | VCCA = VCCY = 5.5 V, EN = 0 | 5 | |
| Three-State Mode Supply Current (VCCY) | IHi-Z, Y | 0.1 | 5 | µA | VCCA = VCCY = 5.5 V, EN = 0 | 5 | |
| VCCA to GND | VCCA | -0.3 | 7 | V | 6 | ||
| VCCY to GND | VCCY | 7 | V | 6 | |||
| EN to GND | EN | -0.3 | 7 | V | 6 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 6 | ||
| Storage Temperature Range | -65 | 150 | °C | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| Propagation Delay A→Y, VCCA=3.3 V to 5 V (VCCY 5 V) | tP, A→Y | 6 | 10 | ns | 3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V; RS = RT = 50 Ω, CL = 50 pF, see Figure 37 | 4 | |
| Propagation Delay Y→A, VCCA=3.3 V to 5 V (VCCY 5 V) | tP, Y→A | 4 | 7 | ns | 3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V; RS = RT = 50 Ω, CL = 15 pF, see Figure 38 | 4 | |
| Propagation Delay A→Y, VCCA=1.8 V to 3.3 V | tP, A→Y | 8 | 11 | ns | 1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 50 pF, see Figure 37 | 4 | |
| Propagation Delay Y→A, VCCA=1.8 V to 3.3 V | tP, Y→A | 5 | 8 | ns | 1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 15 pF, see Figure 38 | 4 | |
| Propagation Delay A→Y, VCCA=1.15 V to 1.3 V, VCCY=3.3 V | tP, A→Y | 9 | 18 | ns | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 50 pF, see Figure 37 | 4 | |
| Propagation Delay Y→A, VCCA=1.15 V to 1.3 V, VCCY=3.3 V | tP, Y→A | 5 | 9 | ns | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 15 pF, see Figure 38 | 4 | |
| Propagation Delay A→Y, VCCA=1.15 V to 1.3 V, VCCY=1.8 V | tP, A→Y | 12 | 25 | ns | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 1.8 V ± 0.3 V; RS = RT = 50 Ω, CL = 50 pF, see Figure 37 | 5 | |
| Propagation Delay Y→A, VCCA=1.15 V to 1.3 V, VCCY=1.8 V | tP, Y→A | 14 | 35 | ns | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 1.8 V ± 0.3 V; RS = RT = 50 Ω, CL = 15 pF, see Figure 38 | 5 | |
| Propagation Delay A→Y, VCCA=2.5 V to 3.3 V | tP, A→Y | 7 | 10 | ns | 2.5 V ± 0.2 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 50 pF, see Figure 37 | 5 | |
| Propagation Delay Y→A, VCCA=2.5 V to 3.3 V | tP, Y→A | 5 | 8 | ns | 2.5 V ± 0.2 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; RS = RT = 50 Ω, CL = 15 pF, see Figure 38 | 5 | |
| Maximum Data Rate A→Y, VCCA=3.3 V to 5 V (VCCY 5 V) | DMAX, A→Y | 50 | Mbps | 3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V; CL = 50 pF | 4 | ||
| Maximum Data Rate Y→A, VCCA=3.3 V to 5 V (VCCY 5 V) | DMAX, Y→A | 50 | Mbps | 3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V; CL = 15 pF | 4 | ||
| Maximum Data Rate A→Y, VCCA=1.8 V to 3.3 V | DMAX, A→Y | 50 | Mbps | 1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 50 pF | 4 | ||
| Maximum Data Rate Y→A, VCCA=1.8 V to 3.3 V | DMAX, Y→A | 50 | Mbps | 1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 15 pF | 4 | ||
| Maximum Data Rate A→Y, VCCA=1.15 V to 1.3 V, VCCY=3.3 V | DMAX, A→Y | 40 | Mbps | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 50 pF | 4 | ||
| Maximum Data Rate Y→A, VCCA=1.15 V to 1.3 V, VCCY=3.3 V | DMAX, Y→A | 40 | Mbps | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 15 pF | 4 | ||
| Maximum Data Rate A→Y, VCCA=1.15 V to 1.3 V, VCCY=1.8 V | DMAX, A→Y | 25 | Mbps | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 1.8 V ± 0.3 V; CL = 50 pF | 5 | ||
| Maximum Data Rate Y→A, VCCA=1.15 V to 1.3 V, VCCY=1.8 V | DMAX, Y→A | 25 | Mbps | 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 1.8 V ± 0.3 V; CL = 15 pF | 5 | ||
| Maximum Data Rate A→Y, VCCA=2.5 V to 3.3 V | DMAX, A→Y | 60 | Mbps | 2.5 V ± 0.2 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 50 pF | 5 | ||
| Maximum Data Rate Y→A, VCCA=2.5 V to 3.3 V | DMAX, Y→A | 60 | Mbps | 2.5 V ± 0.2 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V; CL = 15 pF | 5 | ||
| Thermal Impedance, 14-Lead TSSOP (4-layer board) | θJA | 89.21 | °C/W | 4-layer board | 6 |
CAD (KiCad official)
- Symbol:
ADG3304WBRUZ-REEL - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
adg3304wbruz-reel-etched.step/adg3304wbruz-reel-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adg3304wbruz-reel.step/adg3304wbruz-reel.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (21 pp, sha256
e7c81c0064c760d3, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).