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ADG1404YRUZ

Analog Devices · Analog Switches, Multiplexers · TSSOP-14

ADG1404YRUZ from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Logic control input (address bit) that selects which source is connected to D; the digital input thresholds are VINH min 2.0 V and VINL max 0.8 V.
2 EN input Active-high digital enable input; when low the device is disabled and all switches are off, and when high the Ax inputs determine which switch is on.
3 VSS power_in Most negative power supply potential; absolute maximum VDD to VSS is 35 V and VSS to GND is +0.3 V to −25 V.
4 S1 bidirectional Source terminal that can be an input or an output; peak current is 600 mA (pulsed at 1 ms, 10% duty cycle maximum) and continuous current is limited per Table 4.
5 S2 bidirectional Source terminal that can be an input or an output; peak current is 600 mA (pulsed at 1 ms, 10% duty cycle maximum) and continuous current is limited per Table 4.
6 D bidirectional Common drain terminal that can be an input or an output; peak current is 600 mA (pulsed at 1 ms, 10% duty cycle maximum) and continuous current is limited per Table 4.
7 NC unconnected No connection; the pin is not internally connected (grouped with pins 8 and 9 as '7 to 9' in Table 6).
8 NC unconnected No connection; the pin is not internally connected (grouped with pins 7 and 9 as '7 to 9' in Table 6).
9 NC unconnected No connection; the pin is not internally connected (grouped with pins 7 and 8 as '7 to 9' in Table 6).
10 S4 bidirectional Source terminal that can be an input or an output; peak current is 600 mA (pulsed at 1 ms, 10% duty cycle maximum) and continuous current is limited per Table 4.
11 S3 bidirectional Source terminal that can be an input or an output; peak current is 600 mA (pulsed at 1 ms, 10% duty cycle maximum) and continuous current is limited per Table 4.
12 VDD power_in Most positive power supply potential; absolute maximum VDD to VSS is 35 V and VDD to GND is −0.3 V to +25 V.
13 GND power_in Ground (0 V) reference for the device.
14 A1 input Logic control input (address bit) that selects which source is connected to D; the digital input thresholds are VINH min 2.0 V and VINL max 0.8 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-14
Category Interface
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
15 V dual supply: On Resistance (RON) RON 1.5 2.6 Ω Max: VDD = +13.5 V, VSS = −13.5 V. Typ: VS = ±10 V, IS = −10 mA 3
15 V dual supply: On-Resistance Match Between Channels (ΔRON) ΔRON 0.1 0.21 Ω VS = ±10 V, IS = −10 mA 3
15 V dual supply: On-Resistance Flatness (RFLAT(ON)) RFLAT(ON) 0.3 0.45 Ω VS = ±10 V, IS = −10 mA 3
15 V dual supply: Source Off Leakage (IS(Off)) IS(Off) -12.5 0.03 12.5 nA VS = ±10 V, Vs = ∓10 V; see Figure 23 3
15 V dual supply: Drain Off Leakage (ID(Off)) ID(Off) -30 0.04 30 nA VS = ±10 V, Vs = ∓10 V; see Figure 23 3
15 V dual supply: Channel On Leakage (ID, IS(On)) ID, IS(On) -30 0.1 30 nA VS = VD = ±10 V; see Figure 24 3
15 V dual supply: Input High Voltage (VINH) VINH 2 V 3
15 V dual supply: Input Low Voltage (VINL) VINL 0.8 V 3
15 V dual supply: Input Current (IINL or IINH) IINL or IINH -0.1 0.005 0.1 µA VIN = VGND or VDD 3
15 V dual supply: Transition Time (tTRANSITION) tTRANSITION 150 250 ns VS = +10 V; see Figure 29 (typ: RL = 300 Ω, CL = 35 pF) 3
15 V dual supply: Enable Turn-On Time (tON(EN)) tON(EN) 100 165 ns VS = +10 V; see Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 3
15 V dual supply: Enable Turn-Off Time (tOFF(EN)) tOFF(EN) 110 185 ns VS = +10 V; see Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 3
15 V dual supply: Break-Before-Make Time Delay (tBBM) tBBM 10 35 ns VS1 = VS2 = 10 V; see Figure 30 (typ: RL = 300 Ω, CL = 35 pF) 3
15 V dual supply: IDD, digital inputs = 0 V or VDD IDD 0.001 1 µA Digital inputs = 0 V or VDD 3
15 V dual supply: IDD, digital inputs = 5 V IDD 170 285 µA Digital inputs = 5 V 3
15 V dual supply: ISS, digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD 3
15 V dual supply: VDD/VSS supply range (min/max, printed ±4.5/±16.5) VDD/VSS 4.5 16.5 V GND = 0 V 3
12 V single supply: On Resistance (RON) RON 2.8 4.8 Ω Max: VDD = 10.8 V, VSS = 0 V. Typ: VS = 0 V to 10 V, IS = −10 mA 4
12 V single supply: On-Resistance Match Between Channels (ΔRON) ΔRON 0.13 0.25 Ω VS = 0 V to 10 V, IS = −10 mA 4
12 V single supply: On-Resistance Flatness (RFLAT(ON)) RFLAT(ON) 0.6 1.3 Ω VS = 0 V to 10 V, IS = −10 mA 4
12 V single supply: Source Off Leakage (IS(Off)) IS(Off) -12.5 0.02 12.5 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 4
12 V single supply: Drain Off Leakage (ID(Off)) ID(Off) -30 0.03 30 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 4
12 V single supply: Channel On Leakage (ID, IS(On)) ID, IS(On) -30 0.1 30 nA VS = VD = 1 V or 10 V; see Figure 24 4
12 V single supply: Input High Voltage (VINH) VINH 2 V 4
12 V single supply: Input Low Voltage (VINL) VINL 0.8 V 4
12 V single supply: Input Current (IINL or IINH) IINL or IINH -0.1 0.001 0.1 µA VIN = VGND or VDD 4
12 V single supply: Transition Time (tTRANSITION) tTRANSITION 230 430 ns VS = 8 V; see Figure 29 (typ: RL = 300 Ω, CL = 35 pF) 4
12 V single supply: Enable Turn-On Time (tON(EN)) tON(EN) 180 335 ns VS = 8 V; see Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 4
12 V single supply: Enable Turn-Off Time (tOFF(EN)) tOFF(EN) 115 220 ns VS = 8 V; see Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 4
12 V single supply: Break-Before-Make Time Delay (tBBM) tBBM 10 100 ns VS1 = VS2 = 8 V; see Figure 30 (typ: RL = 300 Ω, CL = 35 pF) 4
12 V single supply: IDD, digital inputs = 0 V or VDD IDD 0.001 1 µA Digital inputs = 0 V or VDD 4
12 V single supply: IDD, digital inputs = 5 V IDD 170 285 µA Digital inputs = 5 V 4
12 V single supply: VDD supply range (min/max) VDD 5 16.5 V GND = 0 V, VSS = 0 V 4
5 V dual supply: On Resistance (RON) RON 3.3 5.4 Ω Max: VDD = +4.5 V, VSS = −4.5 V. Typ: VS = ±4.5 V, IS = −10 mA 5
5 V dual supply: On-Resistance Match Between Channels (ΔRON) ΔRON 0.13 0.25 Ω VS = ±4.5 V, IS = −10 mA 5
5 V dual supply: On-Resistance Flatness (RFLAT(ON)) RFLAT(ON) 0.9 1.31 Ω VS = ±4.5 V, IS = −10 mA 5
5 V dual supply: Source Off Leakage (IS(Off)) IS(Off) -12.5 0.02 12.5 nA VS = ±4.5 V, VD = ∓4.5 V; see Figure 23 5
5 V dual supply: Drain Off Leakage (ID(Off)) ID(Off) -15 0.02 15 nA VS = ±4.5 V, VD = ∓4.5 V; see Figure 23 5
5 V dual supply: Channel On Leakage (ID, IS(On)) ID, IS(On) -20 0.05 20 nA VS = VD = ±4.5 V; see Figure 24 5
5 V dual supply: Input High Voltage (VINH) VINH 2 V 5
5 V dual supply: Input Low Voltage (VINL) VINL 0.8 V 5
5 V dual supply: Input Current (IINL or IINH) IINL or IINH -0.1 0.001 0.1 µA VIN = VGND or VDD 5
5 V dual supply: Transition Time (tTRANSITION) tTRANSITION 340 615 ns VS = 3 V; Figure 29 (typ: RL = 300 Ω, CL = 35 pF) 5
5 V dual supply: Enable Turn-On Time (tON(EN)) tON(EN) 260 480 ns VS = 3 V; Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 5
5 V dual supply: Enable Turn-Off Time (tOFF(EN)) tOFF(EN) 220 400 ns VS = 3 V; Figure 31 (typ: RL = 300 Ω, CL = 35 pF) 5
5 V dual supply: Break-Before-Make Time Delay (tBBM) tBBM 50 100 ns VS1 = VS2 = 3 V; see Figure 30 (typ: RL = 300 Ω, CL = 35 pF) 5
5 V dual supply: IDD, digital inputs = 0 V, 5 V, or VDD IDD 0.001 1 µA Digital inputs = 0 V, 5 V, or VDD 5
5 V dual supply: ISS, digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD 5
5 V dual supply: VDD/VSS supply range (min/max, printed ±4.5/±16.5) VDD/VSS 4.5 16.5 V GND = 0 V 5
Continuous current S or D, 15 V dual supply, 14-lead TSSOP (125°C column) IS, ID (continuous) 100 mA VDD = +13.5 V, VSS = −13.5 V 6
Continuous current S or D, 12 V single supply, 14-lead TSSOP (125°C column) IS, ID (continuous) 100 mA VDD = 10.8 V, VSS = 0 V 6
Continuous current S or D, 5 V dual supply, 14-lead TSSOP (125°C column) IS, ID (continuous) 100 mA VDD = +4.5 V, VSS = −4.5 V 6
VDD to VSS VDD to VSS 35 V 7
VDD to GND VDD to GND -0.3 25 V 7
VSS to GND VSS to GND -25 0.3 V Printed as +0.3 V to −25 V 7
Peak Current, S or D IS, ID (peak) 600 mA Pulsed at 1 ms, 10% duty cycle maximum 7
Operating Temperature Range, Automotive (Y Version) TA -40 125 °C Automotive (Y Version) 7
Storage Temperature Range TSTG -65 150 °C 7
Junction Temperature TJ 150 °C 7
14-Lead TSSOP thermal impedance, θJA θJA 112 °C/W 4-layer board 7

CAD (KiCad official)

  • Symbol: ADG1404YRUZ
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: adg1404yruz-etched.step / adg1404yruz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg1404yruz.step / adg1404yruz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 329a78d346501c3a, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF