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ADG1212YRUZ-REEL7

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Analog Devices Analog Switches, Multiplexers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ADG1212YRUZ-REEL7

Analog Devices · Analog Switches, Multiplexers · TSSOP-16

ADG1212YRUZ-REEL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Logic control input for switch 1; 3 V logic compatible, with VINH minimum 2.0 V and VINL maximum 0.8 V.
2 D1 bidirectional Drain terminal of switch 1, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
3 S1 bidirectional Source terminal of switch 1, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
4 VSS power_in Most negative power supply potential; VSS to GND is limited to +0.3 V to −25 V, and VDD to VSS to 35 V maximum, with dual-supply operation specified from ±4.5 V to ±16.5 V.
5 GND power_in Ground (0 V) reference for the device.
6 S4 bidirectional Source terminal of switch 4, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
7 D4 bidirectional Drain terminal of switch 4, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
8 IN4 input Logic control input for switch 4; 3 V logic compatible, with VINH minimum 2.0 V and VINL maximum 0.8 V.
9 IN3 input Logic control input for switch 3; 3 V logic compatible, with VINH minimum 2.0 V and VINL maximum 0.8 V.
10 D3 bidirectional Drain terminal of switch 3, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
11 S3 bidirectional Source terminal of switch 3, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
12 NC unconnected No internal connection; do not connect to this pin.
13 VDD power_in Most positive power supply potential; VDD to GND is limited to −0.3 V to +25 V, and VDD to VSS to 35 V maximum, with dual-supply operation specified from ±4.5 V to ±16.5 V.
14 S2 bidirectional Source terminal of switch 2, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
15 D2 bidirectional Drain terminal of switch 2, which can be an input or output; the analog signal range extends to the supplies (VSS to VDD), and continuous current per channel is limited to 25 mA.
16 IN2 input Logic control input for switch 2; 3 V logic compatible, with VINH minimum 2.0 V and VINL maximum 0.8 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On Resistance (RON) at 25°C, dual supply RON 120 190 Ω VDD = +13.5 V, VSS = −13.5 V 3
On Resistance (RON) at 85°C, dual supply RON 230 Ω VDD = +13.5 V, VSS = −13.5 V 3
On Resistance (RON) at 125°C, dual supply RON 260 Ω VDD = +13.5 V, VSS = −13.5 V 3
On Resistance Match Between Channels (ΔRON) at 25°C, dual supply ΔRON 2.5 6 Ω VS = ±10 V, IS = −1 mA 3
On Resistance Match Between Channels (ΔRON) at 85°C, dual supply ΔRON 10 Ω VS = ±10 V, IS = −1 mA 3
On Resistance Match Between Channels (ΔRON) at 125°C, dual supply ΔRON 11 Ω VS = ±10 V, IS = −1 mA 3
On Resistance Flatness (RFLAT(ON)) at 25°C, dual supply RFLAT(ON) 20 57 Ω VS = −5 V/0 V/+5 V; IS = −1 mA 3
On Resistance Flatness (RFLAT(ON)) at 85°C, dual supply RFLAT(ON) 72 Ω VS = −5 V/0 V/+5 V; IS = −1 mA 3
On Resistance Flatness (RFLAT(ON)) at 125°C, dual supply RFLAT(ON) 79 Ω VS = −5 V/0 V/+5 V; IS = −1 mA 3
Source Off Leakage at 25°C, dual supply IS(Off) -0.1 0.02 0.1 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Source Off Leakage at 85°C, dual supply IS(Off) -0.6 0.6 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Source Off Leakage at 125°C, dual supply IS(Off) -1 1 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Drain Off Leakage at 25°C, dual supply ID(Off) -0.1 0.02 0.1 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Drain Off Leakage at 85°C, dual supply ID(Off) -0.6 0.6 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Drain Off Leakage at 125°C, dual supply ID(Off) -1 1 nA VS = ±10 V, VD = ∓10 V; see Figure 21 3
Channel On Leakage at 25°C, dual supply ID, IS(On) -0.1 0.02 0.1 nA VS = VD = ±10 V; see Figure 22 3
Channel On Leakage at 85°C, dual supply ID, IS(On) -0.6 0.6 nA VS = VD = ±10 V; see Figure 22 3
Channel On Leakage at 125°C, dual supply ID, IS(On) -1 1 nA VS = VD = ±10 V; see Figure 22 3
Input High Voltage VINH 2 V 3
Input Low Voltage VINL 0.8 V 3
Input Current (dual supply) IINL or IINH -0.1 0.005 0.1 µA VIN = VINL or VINH 3
Turn-On Time at 25°C, dual supply tON 110 130 ns VS = 10 V; see Figure 23 3
Turn-On Time at 85°C, dual supply tON 160 ns VS = 10 V; see Figure 23 3
Turn-On Time at 125°C, dual supply tON 195 ns VS = 10 V; see Figure 23 3
Turn-Off Time at 25°C, dual supply tOFF 85 115 ns VS = 10 V; see Figure 23 3
Turn-Off Time at 85°C, dual supply tOFF 130 ns VS = 10 V; see Figure 23 3
Turn-Off Time at 125°C, dual supply tOFF 150 ns VS = 10 V; see Figure 23 3
Source Off Capacitance (CS(Off)) CS(Off) 0.9 1.1 pF VS = 0 V, f = 1 MHz 3
Drain Off Capacitance (CD(Off)) CD(Off) 1 1.2 pF VS = 0 V, f = 1 MHz 3
On Capacitance (CD, CS(On)) CD, CS(On) 2.6 3 pF VS = 0 V, f = 1 MHz 3
Positive Supply Current IDD (dual supply) IDD 0.001 1 µA Digital inputs = 0 V or VDD 4
Positive Supply Current IDD (dual supply) IDD 220 380 µA Digital inputs = 5 V 4
Negative Supply Current ISS (dual supply) ISS 0.001 1 µA Digital inputs = 0 V or VDD 4
Supply range (dual supply, /VDD///VSS/) VDD/VSS 4.5 16.5 V 4
On Resistance (RON) at 125°C, single supply RON 625 Ω VDD = 10.8 V, VSS = 0 V 5
On Resistance Match Between Channels (ΔRON) at 125°C, single supply ΔRON 27 Ω VS = 0 V to 10 V, IS = −1 mA 5
Source Off Leakage at 125°C, single supply IS(Off) -1 1 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 21 5
Drain Off Leakage at 125°C, single supply ID(Off) -1 1 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 21 5
Channel On Leakage at 125°C, single supply ID, IS(On) -1 1 nA VS = VD = 1 V or 10 V; see Figure 22 5
Input High Voltage (single supply) VINH 2 V 5
Input Low Voltage (single supply) VINL 0.8 V 5
Input Current (single supply) IINL or IINH -0.1 0.001 0.1 µA VIN = VINL or VINH 5
Turn-On Time at 125°C, single supply tON 240 ns VS = 8 V; see Figure 23 5
Turn-Off Time at 125°C, single supply tOFF 180 ns VS = 8 V; see Figure 23 5
Source Off Capacitance (CS(Off)), single supply CS(Off) 1.2 1.4 pF VS = 6 V, f = 1 MHz 5
Drain Off Capacitance (CD(Off)), single supply CD(Off) 1.3 1.5 pF VS = 6 V, f = 1 MHz 5
On Capacitance (CD, CS(On)), single supply CD, CS(On) 3.2 3.9 pF VS = 6 V, f = 1 MHz 5
Positive Supply Current IDD (single supply) IDD 0.001 1 µA Digital inputs = 0 V or VDD 5
Positive Supply Current IDD (single supply) IDD 220 1 µA Digital inputs = 5 V 5
Supply range (single supply, VDD) VDD 5 16.5 V VSS = 0 V, GND = 0 V 5
VDD to VSS 35 V 6
VDD to GND -0.3 25 V 6
VSS to GND -25 0.3 V 6
Peak Current, S or D 100 mA pulsed at 1 ms, 10% duty cycle max 6
Continuous Current per Channel, S or D 25 mA 6
Operating Temperature Range (Automotive, Y Version) -40 125 °C 6
Storage Temperature Range -65 150 °C 6
Junction Temperature 150 °C 6
Thermal Impedance θJA, 16-Lead TSSOP θJA 112 °C/W 4-Layer Board 6

CAD (KiCad official)

  • Symbol: ADG1212YRUZ-REEL7
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adg1212yruz-reel7-etched.step / adg1212yruz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg1212yruz-reel7.step / adg1212yruz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 40ff1288edb4dea4, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF