ADF7021BCPZ-RL7

{
  "slug": "adf7021bcpz-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices RF Transceiver ICs, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "rf and wireless",
    "adf7021bcpz-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adf7021bcpz-rl7.kicad_sym",
    "adf7021bcpz-rl7.kicad_mod",
    "adf7021bcpz-rl7.glb",
    "adf7021bcpz-rl7.step",
    "adf7021bcpz-rl7.lbr",
    "docs/hero.png",
    "docs/adf7021bcpz-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adf7021bcpz-rl7-hero.glb",
    "adf7021bcpz-rl7-hero.overlay.json",
    "adf7021bcpz-rl7-etched.glb"
  ],
  "component": {
    "mpn": "ADF7021BCPZ-RL7",
    "manufacturer": "Analog Devices",
    "package": "QFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "RF And Wireless",
    "subcategory": "RF Transceiver ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885231335559168",
    "parts": {
      "symbol": "adf7021bcpz-rl7.kicad_sym",
      "footprint": "adf7021bcpz-rl7.kicad_mod",
      "model_3d": "adf7021bcpz-rl7-hero.glb",
      "model_3d_plain": "adf7021bcpz-rl7-etched.glb",
      "model_3d_step": "adf7021bcpz-rl7-etched.step",
      "model_3d_step_plain": "adf7021bcpz-rl7.step",
      "lbr": "adf7021bcpz-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C206881",
      "digikey": "ADF7021BCPZ-RL7TR-ND",
      "mouser": "584-ADF7021BCPZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T07:43:51Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ADF7021BCPZ-RL7TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "584-ADF7021BCPZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCOIN",
        "type": "passive",
        "description": "Regulator voltage for PA block and VCO cores; the tuning voltage on this pin sets the VCO output frequency, with higher tuning voltage giving higher output frequency."
      },
      {
        "number": "2",
        "name": "CREG1",
        "type": "power_out",
        "description": "Regulator voltage for PA block; a series 3.9 Ω resistor and a 100 nF capacitor between this pin and ground provide regulator stability and noise rejection."
      },
      {
        "number": "3",
        "name": "VDD1",
        "type": "power_in",
        "description": "Voltage supply for PA block and VCO cores; place 0.1 µF and 100 pF decoupling capacitors as close as possible to this pin and tie all VDD pins together."
      },
      {
        "number": "4",
        "name": "RFOUT",
        "type": "output",
        "description": "Modulated signal output with output power from −16 dBm to +13 dBm; impedance match the output to the desired load."
      },
      {
        "number": "5",
        "name": "RFGND",
        "type": "power_in",
        "description": "Ground for the transmitter output stage; tie all GND pins together."
      },
      {
        "number": "6",
        "name": "RFIN",
        "type": "input",
        "description": "LNA input for the receiver section; input matching is required between the antenna and the differential LNA input to ensure maximum power transfer."
      },
      {
        "number": "7",
        "name": "RFINB",
        "type": "input",
        "description": "Complementary LNA input for the receiver section (see LNA/PA matching)."
      },
      {
        "number": "8",
        "name": "RLNA",
        "type": "passive",
        "description": "External bias resistor for the LNA; optimum value is 1.1 kΩ with 5% tolerance."
      },
      {
        "number": "9",
        "name": "VDD4",
        "type": "power_in",
        "description": "Voltage supply for LNA/mixer block; decouple to ground with a 10 nF capacitor."
      },
      {
        "number": "10",
        "name": "RSET",
        "type": "passive",
        "description": "External resistor that sets charge pump current and some internal bias currents; use a 3.6 kΩ resistor with 5% tolerance."
      },
      {
        "number": "11",
        "name": "CREG4",
        "type": "power_out",
        "description": "Regulator voltage for LNA/mixer block; place a 100 nF capacitor between this pin and GND."
      },
      {
        "number": "12",
        "name": "GND4",
        "type": "power_in",
        "description": "Ground for LNA/mixer block."
      },
      {
        "number": "13",
        "name": "MIX_I",
        "type": "unconnected",
        "description": "Signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "14",
        "name": "MIX_I",
        "type": "unconnected",
        "description": "Complementary signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "15",
        "name": "MIX_Q",
        "type": "unconnected",
        "description": "Signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "16",
        "name": "MIX_Q",
        "type": "unconnected",
        "description": "Complementary signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "17",
        "name": "FILT_I",
        "type": "unconnected",
        "description": "Signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "18",
        "name": "FILT_I",
        "type": "unconnected",
        "description": "Complementary signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "19",
        "name": "GND4",
        "type": "power_in",
        "description": "Ground for LNA/mixer block."
      },
      {
        "number": "20",
        "name": "FILT_Q",
        "type": "unconnected",
        "description": "Signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "21",
        "name": "FILT_Q",
        "type": "unconnected",
        "description": "Complementary signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "22",
        "name": "GND4",
        "type": "power_in",
        "description": "Ground for LNA/mixer block."
      },
      {
        "number": "23",
        "name": "TEST_A",
        "type": "unconnected",
        "description": "Signal chain test pin that is high impedance under normal conditions; leave unconnected."
      },
      {
        "number": "24",
        "name": "CE",
        "type": "input",
        "description": "Chip enable; bringing CE low puts the device into complete power-down, register values are lost, and the device must be reprogrammed once CE is brought high."
      },
      {
        "number": "25",
        "name": "SLE",
        "type": "input",
        "description": "Load enable CMOS input; when SLE goes high, data in the shift registers is loaded into one of four latches selected by the control bits."
      },
      {
        "number": "26",
        "name": "SDATA",
        "type": "input",
        "description": "Serial data input, loaded MSB first with the 4 LSBs as control bits; high-impedance CMOS input."
      },
      {
        "number": "27",
        "name": "SREAD",
        "type": "output",
        "description": "Serial data output that feeds readback data (for example AFC or ADC) to the microcontroller, clocked by SCLK."
      },
      {
        "number": "28",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input; data is latched into the 32-bit shift register on the rising clock edge; digital CMOS input."
      },
      {
        "number": "29",
        "name": "GND2",
        "type": "power_in",
        "description": "Ground for digital section."
      },
      {
        "number": "30",
        "name": "ADCIN",
        "type": "input",
        "description": "Input to the internal 7-bit ADC; full scale is 0 V to 1.9 V and readback is made using the SREAD pin."
      },
      {
        "number": "31",
        "name": "CREG2",
        "type": "power_out",
        "description": "Regulator voltage for digital block; place a 100 nF capacitor between this pin and ground."
      },
      {
        "number": "32",
        "name": "VDD2",
        "type": "power_in",
        "description": "Voltage supply for digital block; place a 10 nF decoupling capacitor as close as possible to this pin."
      },
      {
        "number": "33",
        "name": "SWD",
        "type": "output",
        "description": "Sync word detect output, asserted when the sync word sequence is matched, providing an interrupt to the external microcontroller."
      },
      {
        "number": "34",
        "name": "TxRxDATA",
        "type": "bidirectional",
        "description": "Transmit data input and received data output with normal CMOS levels; in receive UART/SPI mode it outputs received data, and in transmit UART/SPI mode it is high impedance."
      },
      {
        "number": "35",
        "name": "TxRxCLK",
        "type": "bidirectional",
        "description": "Data clock output in receive and transmit modes with normal CMOS levels; the positive edge is matched to the centre of the received data, and in UART/SPI transmit mode it is the transmit data input."
      },
      {
        "number": "36",
        "name": "CLKOUT",
        "type": "output",
        "description": "Divided-down crystal reference clock output with 50:50 mark-space ratio, inverted relative to the reference; place a series 1 kΩ resistor as close as possible to the pin when used."
      },
      {
        "number": "37",
        "name": "MUXOUT",
        "type": "output",
        "description": "Multiplexed output providing DIGITAL_LOCK_DETECT and other signals such as REGULATOR_READY to indicate PLL lock and serial interface regulator status."
      },
      {
        "number": "38",
        "name": "OSC2",
        "type": "passive",
        "description": "Connection for the reference crystal (between OSC1 and OSC2); a TCXO can drive this pin with CMOS levels when the internal crystal oscillator is disabled."
      },
      {
        "number": "39",
        "name": "OSC1",
        "type": "passive",
        "description": "Connection for the reference crystal (between OSC2 and OSC1); a TCXO can drive this pin with ac-coupled 0.8 V p-p levels when the internal crystal oscillator is enabled."
      },
      {
        "number": "40",
        "name": "VDD3",
        "type": "power_in",
        "description": "Voltage supply for charge pump and PLL dividers; decouple to ground with a 10 nF capacitor."
      },
      {
        "number": "41",
        "name": "CREG3",
        "type": "power_out",
        "description": "Regulator voltage for charge pump and PLL dividers; place a 100 nF capacitor between this pin and ground."
      },
      {
        "number": "42",
        "name": "CPOUT",
        "type": "output",
        "description": "Charge pump output that generates current pulses integrated in the loop filter to change the VCO control voltage."
      },
      {
        "number": "43",
        "name": "VDD",
        "type": "power_in",
        "description": "Voltage supply for XTAL and bandgap core; decouple to ground with a 10 nF capacitor."
      },
      {
        "number": "44",
        "name": "L2",
        "type": "passive",
        "description": "External VCO inductor pin; connect a chip inductor across L1 and L2 to set the VCO frequency, or leave floating when using the internal VCO inductor."
      },
      {
        "number": "45",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for VCO block."
      },
      {
        "number": "46",
        "name": "L1",
        "type": "passive",
        "description": "External VCO inductor pin; connect a chip inductor across L1 and L2 to set the VCO frequency, or leave floating when using the internal VCO inductor."
      },
      {
        "number": "47",
        "name": "GND1",
        "type": "power_in",
        "description": "Ground for VCO block."
      },
      {
        "number": "48",
        "name": "CVCO",
        "type": "passive",
        "description": "Place a 22 nF capacitor between this pin and CREG1 to reduce VCO noise."
      },
      {
        "number": "49",
        "name": "EPAD",
        "type": "power_in",
        "description": "Exposed pad that must be connected to GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The text extraction dropped the overbars on complementary pin names (MIX_I, MIX_Q, FILT_I, FILT_Q ap; Table 8 lists '44, 46 L2, L1' and '45, 47 GND, GND1'. The pin-configuration figure text was not clea; VCOIN is both a regulator voltage for the PA and VCO cores and a VCO tuning voltage input. It is typ",
          "2/49 pins cited to the wrong page (name found elsewhere): ['38:OSC2@p17', '39:OSC1@p17']"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0972,
        "at": "2026-10-19T07:43:29"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885231335559168",
        "pages": 62,
        "sha256": "712a957a378855e6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "adf7021bcpz-rl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adf7021bcpz-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d6944e81118eee5a6f3ff6d200c1ef0a691cb32b41a4f1daa74d43cceac69fde",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}