component
ADF4002BRUZ
Public Made by Adomby adom
Analog Devices RF Detectors, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# ADF4002BRUZ++**Analog Devices** · RF Detectors · TSSOP-16++ADF4002BRUZ from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RSET | passive | Charge pump current setting resistor to CPGND; range 3.0 to 11 kΩ at nominal 0.66 V. |+| 2 | CP | output | Charge pump output (±0.625 to 5.44 mA) to external loop filter for VCO control. |+| 3 | CPGND | power_in | Charge pump ground return path. |+| 4 | AGND | power_in | Analog ground return path for RF input stage. |+| 5 | RFINB | input | Complementary RF input; 100 pF bypass capacitor to ground plane required. |+| 6 | RFINA | input | RF input (5 to 400 MHz, −10 to 0 dBm), AC-coupled from external VCO. |+| 7 | AVDD | power_in | Analog power supply (2.7 to 3.3 V, must equal DVDD) with decoupling to analog ground plane. |+| 8 | REFIN | input | Reference input (20 to 300 MHz, 0.8 VDD p-p sensitivity), CMOS level with 100 kΩ input resistance. |+| 9 | DGND | power_in | Digital ground return path for digital logic circuits. |+| 10 | CE | input | Chip enable; low powers down device immediately, high enables based on power-down bit F2. |+| 11 | CLK | input | Serial clock input (maximum 20 MHz) for shifting data into 24-bit register on rising edge. |+| 12 | DATA | input | Serial data input (MSB first), 24-bit format with control bits C2, C1 in two LSBs. |+| 13 | LE | input | Load enable input; transfers shift register data to selected latch (control bits C2, C1) on rising edge. |+| 14 | MUXOUT | output | Programmable multiplexer output for digital/analog lock detect, R counter, or N counter via M3, M2, M1 control bits. |+| 15 | DVDD | power_in | Digital power supply (2.7 to 3.3 V, must equal AVDD) with decoupling to digital ground plane. |+| 16 | VP | power_in | Charge pump power supply (AVDD to 5.5 V) for extended VCO tuning range up to 5 V in 3 V systems. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | TSSOP-16 |+| Category | RF And Wireless |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ADF4002BRUZ`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `adf4002bruz-etched.step` / `adf4002bruz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adf4002bruz.step` / `adf4002bruz.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883765796220928) (20 pp, sha256 `fc5279ef463a7fa2`, retrieved 2026-09-17, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/adf4002bruz-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "adf4002bruz",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices RF Detectors, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "rf and wireless",+ "adf4002bruz",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "adf4002bruz.kicad_sym",+ "adf4002bruz.kicad_mod",+ "adf4002bruz.glb",+ "adf4002bruz.step",+ "adf4002bruz.lbr",+ "docs/hero.png",+ "docs/adf4002bruz-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "ADF4002BRUZ",+ "manufacturer": "Analog Devices",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "RF And Wireless",+ "subcategory": "RF Detectors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883765796220928",+ "parts": {+ "symbol": "adf4002bruz.kicad_sym",+ "footprint": "adf4002bruz.kicad_mod",+ "model_3d": "adf4002bruz-etched.glb",+ "model_3d_plain": "adf4002bruz.glb",+ "model_3d_step": "adf4002bruz-etched.step",+ "model_3d_step_plain": "adf4002bruz.step",+ "lbr": "adf4002bruz.lbr"+ },+ "distributor_links": {+ "lcsc": "C208290"+ },+ "pins": [+ {+ "number": "1",+ "name": "RSET",+ "type": "passive",+ "description": "Charge pump current setting resistor to CPGND; range 3.0 to 11 kΩ at nominal 0.66 V."+ },+ {+ "number": "2",+ "name": "CP",+ "type": "output",+ "description": "Charge pump output (±0.625 to 5.44 mA) to external loop filter for VCO control."+ },+ {+ "number": "3",+ "name": "CPGND",+ "type": "power_in",+ "description": "Charge pump ground return path."+ },+ {+ "number": "4",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return path for RF input stage."+ },+ {+ "number": "5",+ "name": "RFINB",+ "type": "input",+ "description": "Complementary RF input; 100 pF bypass capacitor to ground plane required."+ },+ {+ "number": "6",+ "name": "RFINA",+ "type": "input",+ "description": "RF input (5 to 400 MHz, −10 to 0 dBm), AC-coupled from external VCO."+ },+ {+ "number": "7",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply (2.7 to 3.3 V, must equal DVDD) with decoupling to analog ground plane."+ },+ {+ "number": "8",+ "name": "REFIN",+ "type": "input",+ "description": "Reference input (20 to 300 MHz, 0.8 VDD p-p sensitivity), CMOS level with 100 kΩ input resistance."+ },+ {+ "number": "9",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground return path for digital logic circuits."+ },+ {+ "number": "10",+ "name": "CE",+ "type": "input",+ "description": "Chip enable; low powers down device immediately, high enables based on power-down bit F2."+ },+ {+ "number": "11",+ "name": "CLK",+ "type": "input",+ "description": "Serial clock input (maximum 20 MHz) for shifting data into 24-bit register on rising edge."+ },+ {+ "number": "12",+ "name": "DATA",+ "type": "input",+ "description": "Serial data input (MSB first), 24-bit format with control bits C2, C1 in two LSBs."+ },+ {+ "number": "13",+ "name": "LE",+ "type": "input",+ "description": "Load enable input; transfers shift register data to selected latch (control bits C2, C1) on rising edge."+ },+ {+ "number": "14",+ "name": "MUXOUT",+ "type": "output",+ "description": "Programmable multiplexer output for digital/analog lock detect, R counter, or N counter via M3, M2, M1 control bits."+ },+ {+ "number": "15",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply (2.7 to 3.3 V, must equal AVDD) with decoupling to digital ground plane."+ },+ {+ "number": "16",+ "name": "VP",+ "type": "power_in",+ "description": "Charge pump power supply (AVDD to 5.5 V) for extended VCO tuning range up to 5 V in 3 V systems."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 20,+ "cost_usd": 0.2627,+ "at": "2026-09-17T22:17:27"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883765796220928",+ "pages": 20,+ "sha256": "fc5279ef463a7fa2",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}