component
ADE7758ARWZRL
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Analog Devices Energy Metering, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# ADE7758ARWZRL++**Analog Devices** · Energy Metering · SOIC-24-300mil++ADE7758ARWZRL from Analog Devices, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | APCF | output | Active Power Calibration Frequency logic output providing active power information with full-scale output frequency scalable by writing to APCFNUM and APCFDEN registers. |+| 2 | DGND | power_in | Ground reference for digital circuitry (multiplier, filters, digital-to-frequency converter); acceptable to connect to analog ground plane. |+| 3 | DVDD | power_in | Digital Power Supply providing 5 V ± 5% for digital circuitry; decouple with 10 μF capacitor in parallel with 100 nF ceramic capacitor to DGND. |+| 4 | AVDD | power_in | Analog Power Supply providing 5 V ± 5% for analog circuitry; decouple with 10 μF capacitor in parallel with 100 nF ceramic capacitor to AGND. |+| 5 | IAP | input | Positive differential analog input for Phase A current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 6 | IAN | input | Negative differential analog input for Phase A current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 7 | IBP | input | Positive differential analog input for Phase B current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 8 | IBN | input | Negative differential analog input for Phase B current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 9 | ICP | input | Positive differential analog input for Phase C current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 10 | ICN | input | Negative differential analog input for Phase C current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage. |+| 11 | AGND | power_in | Ground reference for analog circuitry (ADCs, temperature sensor, reference); tie to quiet analog ground plane with single connection point to digital ground plane. |+| 12 | REFIN/OUT | bidirectional | On-chip voltage reference (nominal 2.4 V ± 8%, 30 ppm/°C typical) or external reference input; decouple with 1 μF ceramic capacitor to AGND. |+| 13 | VN | input | Reference input for single-ended voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage. |+| 14 | VCP | input | Single-ended analog input for Phase C voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage. |+| 15 | VBP | input | Single-ended analog input for Phase B voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage. |+| 16 | VAP | input | Single-ended analog input for Phase A voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage. |+| 17 | VARCF | output | Reactive Power Calibration Frequency logic output providing reactive power or apparent power information (selected by VACF bit of WAVMODE register) with full-scale output frequency scalable via VARCFNUM and VARCFDEN registers. |+| 18 | IRQ | output | Active-low open-drain interrupt request output signaling active energy register half-level, apparent energy register half-level, or waveform sampling data available; requires external pull-up resistor. |+| 19 | CLKIN | input | Master clock input for ADCs and digital signal processing with specified frequency of 10 MHz (5-15 MHz range); accepts external clock or parallel resonant AT crystal. |+| 20 | CLKOUT | output | Crystal oscillator output pin; can drive one CMOS load when external clock is supplied at CLKIN or crystal is connected across CLKIN and CLKOUT. |+| 21 | CS | input | Active-low chip select logic input for 4-wire serial interface; allows ADE7758 to share serial bus with multiple devices. |+| 22 | DIN | input | Data input for synchronous serial interface; data is shifted in on the falling edge of SCLK. |+| 23 | SCLK | input | Serial clock input for synchronous serial interface with Schmitt-trigger input structure; all serial data transfers are synchronized to this clock. |+| 24 | DOUT | tri_state | Data output for synchronous serial interface; data is shifted out on the rising edge of SCLK and is normally in high impedance state unless driving data onto serial bus. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | SOIC-24-300mil |+| Category | Data Acquisition |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `ADE7758ARWZRL`+- Footprint: `Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm`+- 3D model: SOIC-24-300mil (KiCad packages3D, STEP)+- 3D model files: `ade7758arwzrl-etched.step` / `ade7758arwzrl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ade7758arwzrl.step` / `ade7758arwzrl.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884935582601216) (72 pp, sha256 `e9056869364b2e8d`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ade7758arwzrl-datasheet.pdf)
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acceptable to connect to analog ground plane."+ },+ {+ "number": "3",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital Power Supply providing 5 V ± 5% for digital circuitry; decouple with 10 μF capacitor in parallel with 100 nF ceramic capacitor to DGND."+ },+ {+ "number": "4",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog Power Supply providing 5 V ± 5% for analog circuitry; decouple with 10 μF capacitor in parallel with 100 nF ceramic capacitor to AGND."+ },+ {+ "number": "5",+ "name": "IAP",+ "type": "input",+ "description": "Positive differential analog input for Phase A current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "6",+ "name": "IAN",+ "type": "input",+ "description": "Negative differential analog input for Phase A current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "7",+ "name": "IBP",+ "type": "input",+ "description": "Positive differential analog input for Phase B current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "8",+ "name": "IBN",+ "type": "input",+ "description": "Negative differential analog input for Phase B current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "9",+ "name": "ICP",+ "type": "input",+ "description": "Positive differential analog input for Phase C current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "10",+ "name": "ICN",+ "type": "input",+ "description": "Negative differential analog input for Phase C current channel with maximum differential input signal of ±0.5 V depending on PGA gain selection; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "11",+ "name": "AGND",+ "type": "power_in",+ "description": "Ground reference for analog circuitry (ADCs, temperature sensor, reference); tie to quiet analog ground plane with single connection point to digital ground plane."+ },+ {+ "number": "12",+ "name": "REFIN/OUT",+ "type": "bidirectional",+ "description": "On-chip voltage reference (nominal 2.4 V ± 8%, 30 ppm/°C typical) or external reference input; decouple with 1 μF ceramic capacitor to AGND."+ },+ {+ "number": "13",+ "name": "VN",+ "type": "input",+ "description": "Reference input for single-ended voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "14",+ "name": "VCP",+ "type": "input",+ "description": "Single-ended analog input for Phase C voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "15",+ "name": "VBP",+ "type": "input",+ "description": "Single-ended analog input for Phase B voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "16",+ "name": "VAP",+ "type": "input",+ "description": "Single-ended analog input for Phase A voltage channel with maximum signal level of ±0.5 V with respect to VN; overvoltage of ±6 V can be sustained without damage."+ },+ {+ "number": "17",+ "name": "VARCF",+ "type": "output",+ "description": "Reactive Power Calibration Frequency logic output providing reactive power or apparent power information (selected by VACF bit of WAVMODE register) with full-scale output frequency scalable via VARCFNUM and VARCFDEN registers."+ },+ {+ "number": "18",+ "name": "IRQ",+ "type": "output",+ "description": "Active-low open-drain interrupt request output signaling active energy register half-level, apparent energy register half-level, or waveform sampling data available; requires external pull-up resistor."+ },+ {+ "number": "19",+ "name": "CLKIN",+ "type": "input",+ "description": "Master clock input for ADCs and digital signal processing with specified frequency of 10 MHz (5-15 MHz range); accepts external clock or parallel resonant AT crystal."+ },+ {+ "number": "20",+ "name": "CLKOUT",+ "type": "output",+ "description": "Crystal oscillator output pin; can drive one CMOS load when external clock is supplied at CLKIN or crystal is connected across CLKIN and CLKOUT."+ },+ {+ "number": "21",+ "name": "CS",+ "type": "input",+ "description": "Active-low chip select logic input for 4-wire serial interface; allows ADE7758 to share serial bus with multiple devices."+ },+ {+ "number": "22",+ "name": "DIN",+ "type": "input",+ "description": "Data input for synchronous serial interface; data is shifted in on the falling edge of SCLK."+ },+ {+ "number": "23",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input for synchronous serial interface with Schmitt-trigger input structure; all serial data transfers are synchronized to this clock."+ },+ {+ "number": "24",+ "name": "DOUT",+ "type": "tri_state",+ "description": "Data output for synchronous serial interface; data is shifted out on the rising edge of SCLK and is normally in high impedance state unless driving data onto serial bus."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 72,+ "cost_usd": 0.7146,+ "at": "2026-09-22T02:01:07"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884935582601216",+ "pages": 72,+ "sha256": "e9056869364b2e8d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}