# ADC3582IRSBR

**Texas Instruments** · Analog To Digital Converters (ADC) · WQFN-40(5x5)

ADC3582IRSBR from Texas Instruments, in a WQFN-40(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PDN/SYNC | input | Power down/synchronization input, active high, configurable via SPI, with an internal 21 kΩ pull-down resistor. |
| 2 | VREF | power_in | External voltage reference input, 1.6 V. |
| 3 | REFGND | power_in | Reference ground input, 0 V. |
| 4 | REFBUF | input | 1.2 V external voltage reference input for use with the internal reference buffer, with an internal 100 kΩ pull-up to AVDD; this pin also configures default operating conditions. |
| 5 | AVDD | power_in | Analog 1.8 V power supply, 1.75 V to 1.85 V recommended, measured to GND. |
| 6 | CLKP | input | Positive differential sampling clock input for the ADC. |
| 7 | CLKM | input | Negative differential sampling clock input for the ADC. |
| 8 | VCM | power_out | Common-mode voltage output for the analog inputs, 0.95 V. |
| 9 | RESET | input | Hardware reset, active high, with an internal 21 kΩ pull-down resistor. |
| 10 | SDIO | bidirectional | Serial interface data input and output, with an internal 21 kΩ pull-down resistor. |
| 11 | GND | power_in | Ground, 0 V. |
| 12 | AINP | input | Positive analog input for channel A, intended to be driven differentially. |
| 13 | AINM | input | Negative analog input for channel A, intended to be driven differentially. |
| 14 | GND | power_in | Ground, 0 V. |
| 15 | AVDD | power_in | Analog 1.8 V power supply, 1.75 V to 1.85 V recommended, measured to GND. |
| 16 | SEN | input | Serial interface enable, active low, with an internal 21 kΩ pull-up resistor to AVDD. |
| 17 | DA1M | output | Negative differential serial LVDS output for lane 1, channel A. |
| 18 | DA1P | output | Positive differential serial LVDS output for lane 1, channel A. |
| 19 | DA0M | output | Negative differential serial LVDS output for lane 0, channel A. |
| 20 | DA0P | output | Positive differential serial LVDS output for lane 0, channel A. |
| 21 | IOVDD | power_in | 1.8 V power supply for the digital interface, 1.75 V to 1.85 V recommended, measured to GND. |
| 22 | DCLKM | output | Negative differential serial LVDS bit clock output. |
| 23 | DCLKP | output | Positive differential serial LVDS bit clock output. |
| 24 | DCLKINM | input | Negative differential serial LVDS bit clock input, with internal 100 Ω differential termination. |
| 25 | DCLKINP | input | Positive differential serial LVDS bit clock input, with internal 100 Ω differential termination. |
| 26 | IOGND | power_in | Ground, 0 V for the digital interface. |
| 27 | NC | unconnected | Do not connect. |
| 28 | FCLKP | output | Positive differential serial LVDS frame clock output. |
| 29 | FCLKM | output | Negative differential serial LVDS frame clock output. |
| 30 | IOVDD | power_in | 1.8 V power supply for the digital interface, 1.75 V to 1.85 V recommended, measured to GND. |
| 31 | DB0P | output | Positive differential serial LVDS output for lane 0, channel B; used only in dual band complex decimation and powered down by default. |
| 32 | DB0M | output | Negative differential serial LVDS output for lane 0, channel B; used only in dual band complex decimation and powered down by default. |
| 33 | DB1P | output | Positive differential serial LVDS output for lane 1, channel B; used only in dual band complex decimation and powered down by default. |
| 34 | DB1M | output | Negative differential serial LVDS output for lane 1, channel B; used only in dual band complex decimation and powered down by default. |
| 35 | SCLK | input | Serial interface clock input, with an internal 21 kΩ pull-down resistor. |
| 36 | AVDD | power_in | Analog 1.8 V power supply, 1.75 V to 1.85 V recommended, measured to GND. |
| 37 | GND | power_in | Ground, 0 V. |
| 38 | NC | unconnected | Do not connect. |
| 39 | NC | unconnected | Do not connect. |
| 40 | GND | power_in | Ground, 0 V. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-40(5x5) |
| Category | Data Acquisition |
| Pins | 41 |

## CAD (KiCad official)

- Symbol: `ADC3582IRSBR`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm`
- 3D model: WQFN-40(5x5) (KiCad packages3D, STEP)
- 3D model files: `adc3582irsbr-etched.step` / `adc3582irsbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adc3582irsbr.step` / `adc3582irsbr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600384577315745792) (85 pp, sha256 `a1b506c7d1a24eb0`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/adc3582irsbr-datasheet.pdf)