main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6h ago
viewers adc088s102cimtx: viewers · Ray 6h ago
adc088s102cimtx-etched.glb adc088s102cimtx: factory component page (tier=lcsc) · Ray 6h ago
adc088s102cimtx-etched.step adc088s102cimtx: factory component page (tier=lcsc) · Ray 6h ago
adc088s102cimtx-hero.glb Publish 0.1.0 · Ray 6h ago
adc088s102cimtx-hero.overlay.json Publish 0.1.0 · Ray 6h ago
adc088s102cimtx.glb Publish 0.1.0 · Ray 6h ago
adc088s102cimtx.kicad_mod Publish 0.1.0 · Ray 6h ago
adc088s102cimtx.kicad_sym Publish 0.1.0 · Ray 6h ago
adc088s102cimtx.lbr Publish 0.1.0 · Ray 6h ago
adc088s102cimtx.step Publish 0.1.0 · Ray 6h ago
package.json adc088s102cimtx: LCSC part number C701587 (was published as the bare integer) · Ray 6h ago
page.json adc088s102cimtx: LCSC part number C701587 (was published as the bare integer) · Ray 6h ago
README.md Initial commit: component/adc088s102cimtx · Ray 6h ago

ADC088S102CIMTX

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16

ADC088S102CIMTX from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip select; conversion process begins on falling edge and continues while held low.
2 VA power_in Positive analog supply, +2.7V to +5.25V, also used as reference voltage.
3 AGND power_in Analog supply and signal ground return.
4 IN0 input Analog input, accepts signals from 0V to VREF.
5 IN1 input Analog input, accepts signals from 0V to VREF.
6 IN2 input Analog input, accepts signals from 0V to VREF.
7 IN3 input Analog input, accepts signals from 0V to VREF.
8 IN4 input Analog input, accepts signals from 0V to VREF.
9 IN5 input Analog input, accepts signals from 0V to VREF.
10 IN6 input Analog input, accepts signals from 0V to VREF.
11 IN7 input Analog input, accepts signals from 0V to VREF.
12 DGND power_in Digital supply and signal ground return.
13 VD power_in Positive digital supply, +2.7V to VA.
14 DIN input Digital data input for control register loading on rising edges of SCLK.
15 DOUT output Digital data output; output samples clocked out on falling edges of SCLK.
16 SCLK input Digital clock input with specified operating frequency range of 8 MHz to 16 MHz.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: ADC088S102CIMTX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adc088s102cimtx-etched.step / adc088s102cimtx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc088s102cimtx.step / adc088s102cimtx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 7b04f0fa8c1bf5a9, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF