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ADC0834CCN

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Texas Instruments Analog To Digital Converters (ADCs), PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADC0834CCN

Texas Instruments · Analog To Digital Converters (ADCs) · PDIP-14

ADC0834CCN from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V+ power_in Shunt regulator supply input with an internal 6.3 to 8.5V zener to GND, connected to VCC through a diode; limit current into V+ to 15 mA max with a series resistor.
2 CS input Active-low chip select that must be held low for the entire conversion; all internal registers are cleared when it is high.
3 CH0 input Analog multiplexer input channel 0, usable single-ended or as part of a differential pair, range -0.3V to VCC+0.3V.
4 CH1 input Analog multiplexer input channel 1, usable single-ended or as part of a differential pair, range -0.3V to VCC+0.3V.
5 CH2 input Analog multiplexer input channel 2, usable single-ended or as part of a differential pair, range -0.3V to VCC+0.3V.
6 CH3 input Analog multiplexer input channel 3, usable single-ended or as part of a differential pair, range -0.3V to VCC+0.3V.
7 DGND power_in Digital ground reference for the device.
8 AGND power_in Analog ground, to which the COM input is internally connected.
9 VREF power_in Reference voltage input defining the analog input span, typically 3.5 kOhm input resistance and not to exceed VCC.
10 DO tri_state TRI-STATE serial data output that shifts out the conversion result MSB first on falling clock edges, with 2.4V min logic-1 output at -360 uA.
11 SARS output SAR status output that goes high while a conversion is in progress.
12 CLK input Clock input of 10 kHz to 400 kHz that shifts in MUX address data on rising edges and shifts out data.
13 DI input Serial data input that clocks the start bit and MUX address assignment word into the shift register on rising clock edges.
14 VCC power_in Converter supply voltage, 4.5 VDC to 6.3 VDC operating range with 6.5V absolute maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Total Unadjusted Error -1 1 LSB ADC0831/2/4/8CCN, VREF = 5.00 V 4
Minimum Reference Input Resistance 1.3 3.5 kΩ 4
Maximum Reference Input Resistance 3.5 5.9 kΩ 4
Minimum Common-Mode Input Range -0.05 V GND −0.05 V 4
Internal Zener Breakdown at V+ VZ 6.3 8.5 V 15 mA into V+ 4
Off Channel Leakage Current (min) IOFF -1 -0.2 μA On Channel = 5V, Off Channel = 0V 4
Off Channel Leakage Current (max) IOFF 0.2 1 μA On Channel = 0V, Off Channel = 5V 4
On Channel Leakage Current (min) ION -1 -0.2 μA On Channel = 0V, Off Channel = 5V 4
On Channel Leakage Current (max) ION 0.2 1 μA On Channel = 5V, Off Channel = 0V 4
Logical 1 Input Voltage VIN(1) 2 V VCC = 5.25V 5
Logical 0 Input Voltage VIN(0) 0.8 V VCC = 4.75V 5
Logical 1 Input Current IIN(1) 0.005 1 μA VIN = 5.0V 5
Logical 0 Input Current IIN(0) -1 -0.005 μA VIN = 0V 5
Logical 1 Output Voltage VOUT(1) 2.4 V VCC = 4.75V, IOUT = −360 μA 5
Logical 1 Output Voltage VOUT(1) 4.5 V VCC = 4.75V, IOUT = −10 μA 5
Logical 0 Output Voltage VOUT(0) 0.4 V VCC = 4.75V, IOUT = 1.6 mA 5
TRI-STATE Output Current (low) IOUT -3 -0.1 μA VOUT = 0V 5
TRI-STATE Output Current (high) IOUT 0.1 3 μA VOUT = 5V 5
Output Source Current ISOURCE -6.5 -14 mA VOUT = 0V 5
Output Sink Current ISINK 8 16 mA VOUT = VCC 5
Supply Current Including Ladder Current ICC 0.9 2.5 mA ADC0831-N, ADC0834-N, ADC0838-N 5
Clock Frequency fCLK 10 400 kHz VCC = 5V, 25°C 6
Conversion Time tC 8 1/fCLK Not including MUX Addressing Time 6
Clock Duty Cycle 40 60 % 6
Set-up Time, CS Falling Edge or Data Input Valid to CLK Rising Edge tSET-UP 250 ns 6
Hold Time, Data Input Valid after CLK Rising Edge tHOLD 90 ns 6
CLK Falling Edge to Output Data Valid, MSB First tpd1, tpd0 650 1500 ns CL=100 pF, Data MSB First 6
CLK Falling Edge to Output Data Valid, LSB First tpd1, tpd0 250 600 ns CL=100 pF, Data LSB First 6
Rising Edge of CS to Data Output and SARS Hi-Z t1H, t0H 125 250 ns CL=10 pF, RL=10k 6
Rising Edge of CS to Data Output and SARS Hi-Z t1H, t0H 500 ns CL=100 pf, RL=2k 6
Capacitance of Logic Input CIN 5 pF 6
Capacitance of Logic Outputs COUT 5 pF 6
Supply Voltage VCC 4.5 6.3 V VDC 3
Operating Temperature Range TA -40 85 °C ADC0831/2/4/8CCN 3
Supply Voltage VCC 6.5 V 3
Current into V+ 15 mA 3
Input Current per Pin -5 5 mA 3
Input Current per Package -20 20 mA 3
Storage Temperature -65 150 °C 3
Package Dissipation 0.8 W TA = 25°C (Board Mount) 3
Lead Temperature (Soldering 10 sec.) 260 °C PDIP Package 3
ESD Susceptibility 2000 V Human body model, 100 pF, 1.5 kΩ 3

CAD (KiCad official)

  • Symbol: ADC0834CCN
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: adc0834ccn-etched.step / adc0834ccn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc0834ccn.step / adc0834ccn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 6120672ffa52db54, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF