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ADC0820CCWMX

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Texas Instruments Analog To Digital Converters (ADCs), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADC0820CCWMX

Texas Instruments · Analog To Digital Converters (ADCs) · SOIC-20-300mil

ADC0820CCWMX from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Analog input with range GND ≤ VIN ≤ VCC.
2 DB0 tri_state TRI-STATE data output, bit 0 (LSB).
3 DB1 tri_state TRI-STATE data output, bit 1.
4 DB2 tri_state TRI-STATE data output, bit 2.
5 DB3 tri_state TRI-STATE data output, bit 3.
6 WR / RDY input In WR-RD mode this is the write input, where with CS low the conversion starts on the falling edge of WR; in RD mode it is RDY, an open-drain output with no internal pull-up that goes low after the falling edge of CS and goes TRI-STATE when the result is strobed into the output latch.
7 Mode input Mode select input, internally tied to GND through a 50 µA current source: low selects RD mode and high selects WR-RD mode.
8 RD input With CS low, the TRI-STATE data outputs are enabled when RD goes low; in WR-RD mode RD can be used to read data before the ~800 ns internal time-out, with the result latched after the falling edge of RD.
9 INT output Conversion-complete output that goes low when the result is in the output latch and is reset by the rising edge of RD or CS.
10 GND power_in Ground reference; all voltages are measured with respect to this pin.
11 VREF(-) power_in Bottom of the resistor ladder, with voltage range GND ≤ VREF(-) ≤ VREF(+).
12 VREF(+) power_in Top of the resistor ladder, with voltage range VREF(-) ≤ VREF(+) ≤ VCC.
13 CS input Chip select; CS must be low for RD or WR to be recognized by the converter.
14 DB4 tri_state TRI-STATE data output, bit 4.
15 DB5 tri_state TRI-STATE data output, bit 5.
16 DB6 tri_state TRI-STATE data output, bit 6.
17 DB7 tri_state TRI-STATE data output, bit 7 (MSB).
18 OFL output Overflow output that goes low at end of conversion if the analog input is higher than VREF(+); it is always active and does not go TRI-STATE, and can be used to cascade two or more devices for 9- or 10-bit resolution.
19 NC unconnected No internal connection.
20 VCC power_in Power supply voltage; operating range is 4.5 V to 8 V with an absolute maximum of 10 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category ADC/DAC/Data Conversion
Pins 20

CAD (KiCad official)

  • Symbol: ADC0820CCWMX
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: adc0820ccwmx-etched.step / adc0820ccwmx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc0820ccwmx.step / adc0820ccwmx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 d0197dc37087a64c, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF