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ADC081S021CIMFX

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Texas Instruments Analog To Digital Converters (ADC), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitionadc081s021cimfxfactory-2.0.0extractor-text

Verified ADC081S021CIMFX

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADC081S021CIMFX · SOT-23-6 · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • ✓datasheet: all 6 pin names found in the 31-page datasheet
  • ✓distributor: lcsc C2670159, digikey ADC081S021CIMFX-ND, mouser 926-ADC081S021CIMFX
  • ✓family: SOT-23-6
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-697y01xu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adc081s021cimfx.kicad_sym✓ adc081s021cimfx.kicad_mod✓ adc081s021cimfx.step
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ADC081S021CIMFX

Texas Instruments · Analog To Digital Converters (ADC) · SOT-23-6

ADC081S021CIMFX from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VA power_in Positive supply pin that must be connected to a quiet 2.7-V to 5.25-V source and bypassed to GND with a 1-µF capacitor and a 0.1-µF monolithic capacitor placed within 1 cm of the power pin.
2 GND power_in The ground return for the supply and signals.
3 VIN power_in Analog input that can range from 0 V to VA.
4 SCLK input Digital clock input that directly controls the conversion and readout processes.
5 SDATA output Digital data output from which the output samples are clocked on falling edges of the SCLK pin.
6 CS input Chip select; on the falling edge of CS a conversion process begins.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Data Acquisition
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog supply voltage VA -0.3 6.5 V 4
Voltage on any digital pin to GND -0.3 6.5 V 4
Input current at any pin -10 10 mA 4
Package input current -20 20 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Analog supply voltage VA 2.7 5.25 V 4
Digital input pins voltage -0.3 5.25 V regardless of supply voltage 4
Analog input pins voltage 0 V upper limit printed as VA 4
Clock frequency 25 20000 kHz 4
Sample rate 1 Msps 4
Operating temperature TA -40 85 °C 4
INL integral non-linearity INL -0.3 0.03 0.3 LSB VA = 2.7 V to 3.6 V 5
INL integral non-linearity INL -0.03 0.04 LSB VA = 4.75 V to 5.25 V, TA = 25°C 5
INL integral non-linearity INL -0.3 0.3 LSB VA = 4.75 V to 5.25 V, TA = -40°C to 85°C 5
DNL differential non-linearity DNL -0.2 0.03 0.2 LSB VA = 2.7 V to 3.6 V 5
DNL differential non-linearity DNL -0.03 0.04 LSB VA = 4.75 V to 5.25 V, TA = 25°C 5
DNL differential non-linearity DNL -0.2 0.2 LSB VA = 4.75 V to 5.25 V, TA = -40°C to 85°C 5
Offset error VOFF -0.2 -0.01 0.2 LSB VA = 2.7 V to 3.6 V 5
Offset error VOFF -0.2 0.03 0.2 LSB VA = 4.75 V to 5.25 V 5
Gain error GE -0.4 0.04 0.4 LSB VA = 2.7 V to 3.6 V 5
Gain error GE -0.4 0.1 0.4 LSB VA = 4.75 V to 5.25 V 5
Total unadjusted error TUE -0.065 0.055 LSB VA = 2.7 V to 3.6 V, TA = 25°C 5
Total unadjusted error TUE -0.3 0.3 LSB VA = 2.7 V to 3.6 V, TA = -40°C to 85°C 5
Total unadjusted error TUE -0.06 0.03 LSB VA = 4.75 V to 5.25 V, TA = 25°C 5
Signal-to-noise plus distortion ratio SINAD 49 49.5 dBFS VA = 2.7 V to 5.25 V, fIN = 100 kHz, -0.02 dBFS 5
Signal-to-noise ratio SNR 49 49.6 dBFS VA = 2.7 V to 5.25 V, fIN = 100 kHz, -0.02 dBFS 5
Total harmonic distortion THD -65 -77 dBFS VA = 2.7 V to 5.25 V, fIN = 100 kHz, -0.02 dBFS 5
Spurious-free dynamic range SFDR 65 68 dBFS VA = 2.7 V to 5.25 V, fIN = 100 kHz, -0.02 dBFS 5
Effective number of bits ENOB 7.8 7.9 Bits VA = 2.7 V to 5.25 V, fIN = 100 kHz, -0.02 dBFS 5
Input current (DC leakage) IDCL -1 1 µA 6
Input high voltage VIH 2.4 V VA = 5.25 V 6
Input high voltage VIH 2.1 V VA = 3.6 V 6
Input low voltage VIL 0.8 V VA = 5 V 6
Input low voltage VIL 0.4 V VA = 3 V 6
Input current IIN -1 0.1 1 µA VIN = 0 V or VA 6
Digital input capacitance CIND 2 4 pF 6
Output low voltage VOL 0.03 0.4 V ISINK = 200 µA 6
TRI-STATE leakage current IOZH, IOZL -10 0.1 10 µA 6
TRI-STATE output capacitance COUT 2 4 pF 6
Supply current, normal mode IA 1.47 2.2 mA VA = 5.25 V, fSAMPLE = 200 ksps, CS low 6
Supply current, normal mode IA 0.36 0.9 mA VA = 3.6 V, fSAMPLE = 200 ksps, CS low 6
Power consumption, normal mode PD 7.7 11.6 mW VA = 5.25 V, CS low 6
Power consumption, normal mode PD 1.3 3.24 mW VA = 3.6 V, CS low 6
Clock frequency fSCLK 1 4 MHz 6
Sample rate fS 50 200 ksps 6
DC SCLK duty cycle DC 40 50 60 % fSCLK = 4 MHz 6
Minimum time required for acquisition tACQ 350 ns 6
Quiet time tQUIET 50 ns 6
Minimum CS pulse width tCS 10 ns 7
CS setup time prior to SCLK falling edge tCSSU 10 ns 7
CS hold time after SCLK falling edge tCSH 1 ns 7
Delay from CS until SDATA TRI-STATE disabled tEN 20 ns 7
Data access time after SCLK falling edge tACC 40 ns VA = 2.7 V to 3.6 V 7
Data access time after SCLK falling edge tACC 20 ns VA = 4.75 V to 5.25 V 7
SCLK to data valid hold time tH 7 ns VA = 2.7 V to 3.6 V 7
SCLK to data valid hold time tH 5 ns VA = 4.75 V to 5.25 V 7
SCLK falling edge to SDATA high impedance tDIS 6 25 ns VA = 2.7 V to 3.6 V 7
SCLK falling edge to SDATA high impedance tDIS 5 25 ns VA = 4.75 V to 5.25 V 7
Junction-to-ambient thermal resistance (DBV SOT-23) RθJA 184.5 °C/W 6-pin DBV (SOT-23) 5
Junction-to-case (top) thermal resistance (DBV SOT-23) RθJC(top) 151.2 °C/W 6-pin DBV (SOT-23) 5
Junction-to-board thermal resistance (DBV SOT-23) RθJB 29.7 °C/W 6-pin DBV (SOT-23) 5

CAD (KiCad official)

  • Symbol: ADC081S021CIMFX
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: adc081s021cimfx-etched.step / adc081s021cimfx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc081s021cimfx.step / adc081s021cimfx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 ff720e5ebabcb516, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF