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ADBMS1818ASWAZ-R7
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Analog Devices Battery Management, LQFP-64-EP(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+168adbms1818aswaz-r7-etched.glbadbms1818aswaz-r7-hero.glbadbms1818aswaz-r7-hero.overlay.json+1505adbms1818aswaz-r7.glbadbms1818aswaz-r7.kicad_mod+709adbms1818aswaz-r7.kicad_sym+273adbms1818aswaz-r7.lbr+303adbms1818aswaz-r7.step+20268docs/adbms1818aswaz-r7-datasheet.pdfdocs/hero.pngpackage.json+538page.json+544viewers/footprint.html+1viewers/symbol.html+1README.mdadded+168@@ -0,0 +1,168 @@+# ADBMS1818ASWAZ-R7++**Analog Devices** · Battery Management · LQFP-64-EP(10x10)++ADBMS1818ASWAZ-R7 from Analog Devices, in a LQFP-64-EP(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | V+ | power_in | Positive supply pin; total supply voltage V+ to V- is rated to 112.5 V absolute maximum. |+| 2 | C0 | input | Cell input C0; input voltage relative to V- is limited to -0.3 V to +6 V. |+| 3 | S1 | passive | Balance input/output S1, connected through an internal N-channel discharge MOSFET between S1 and C0; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1. |+| 4 | C1 | input | Cell input C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1. |+| 5 | S2 | passive | Balance input/output S2, connected through an internal N-channel discharge MOSFET between S2 and C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2. |+| 6 | C2 | input | Cell input C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2. |+| 7 | S3 | passive | Balance input/output S3, connected through an internal N-channel discharge MOSFET between S3 and C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3. |+| 8 | C3 | input | Cell input C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3. |+| 9 | S4 | passive | Balance input/output S4, connected through an internal N-channel discharge MOSFET between S4 and C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4. |+| 10 | C4 | input | Cell input C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4. |+| 11 | S5 | passive | Balance input/output S5, connected through an internal N-channel discharge MOSFET between S5 and C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5. |+| 12 | C5 | input | Cell input C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5. |+| 13 | S6 | passive | Balance input/output S6, connected through an internal N-channel discharge MOSFET between S6 and C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6. |+| 14 | C6 | input | Cell input C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6. |+| 15 | S7 | passive | Balance input/output S7, connected through an internal N-channel discharge MOSFET between S7 and C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7. |+| 16 | C7 | input | Cell input C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7. |+| 17 | S8 | passive | Balance input/output S8, connected through an internal N-channel discharge MOSFET between S8 and C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8. |+| 18 | C8 | input | Cell input C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8. |+| 19 | S9 | passive | Balance input/output S9, connected through an internal N-channel discharge MOSFET between S9 and C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9. |+| 20 | C9 | input | Cell input C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9. |+| 21 | S10 | passive | Balance input/output S10, connected through an internal N-channel discharge MOSFET between S10 and C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10. |+| 22 | C10 | input | Cell input C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10. |+| 23 | S11 | passive | Balance input/output S11, connected through an internal N-channel discharge MOSFET between S11 and C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11. |+| 24 | C11 | input | Cell input C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11. |+| 25 | S12 | passive | Balance input/output S12, connected through an internal N-channel discharge MOSFET between S12 and C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12. |+| 26 | C12 | input | Cell input C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12. |+| 27 | S13 | passive | Balance input/output S13, connected through an internal N-channel discharge MOSFET between S13 and C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13. |+| 28 | C13 | input | Cell input C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13. |+| 29 | S14 | passive | Balance input/output S14, connected through an internal N-channel discharge MOSFET between S14 and C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14. |+| 30 | C14 | input | Cell input C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14. |+| 31 | S15 | passive | Balance input/output S15, connected through an internal N-channel discharge MOSFET between S15 and C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15. |+| 32 | C15 | input | Cell input C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15. |+| 33 | S16 | passive | Balance input/output S16, connected through an internal N-channel discharge MOSFET between S16 and C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16. |+| 34 | C16 | input | Cell input C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16. |+| 35 | S17 | passive | Balance input/output S17, connected through an internal N-channel discharge MOSFET between S17 and C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17. |+| 36 | C17 | input | Cell input C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17. |+| 37 | S18 | passive | Balance input/output S18, connected through an internal N-channel discharge MOSFET between S18 and C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 18. |+| 38 | C18 | input | Cell input C18; input voltage relative to V- is limited to -0.3 V to MIN(V+ + 5.5 V, 112.5 V). |+| 39 | GPIO1 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 40 | GPIO2 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 41 | GPIO3 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port. |+| 42 | GPIO4 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port. |+| 43 | GPIO5 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port. |+| 44 | GPIO6 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 45 | GPIO7 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 46 | GPIO8 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 47 | GPIO9 | bidirectional | General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V. |+| 48 | VREG | power_out | 5 V regulator pin; bypass with an external 1 uF capacitor. |+| 49 | DRIVE | output | Drive pin for an external NPN transistor: connect its base to DRIVE, collector to V+, and emitter to VREG. |+| 50 | VREF2 | power_out | Buffered second reference voltage for driving multiple 10 kOhm thermistors; bypass with an external 1 uF capacitor. |+| 51 | VREF1 | power_out | ADC reference voltage; bypass with an external 1 uF capacitor and no DC loads are allowed. |+| 52 | DTEN | input | Discharge timer enable; connect to VREG to enable the discharge timer. |+| 53 | SDI | input | 4-wire SPI serial data input (digital input); in isoSPI mode (ISOMD tied to VREG) this pin is not used. |+| 54 | SDO | output | 4-wire SPI serial data output, an open-drain NMOS output that requires a 5 kOhm pull-up resistor. |+| 55 | ISOMD | input | Serial interface mode select: tie to VREG for 2-wire isoSPI mode or to V- for 4-wire SPI mode. |+| 56 | WDT | output | Watchdog timer output, an open-drain NMOS; it goes high impedance if no valid command is received within 2 seconds, and may be left disconnected or pulled to VREG through 1 MOhm. |+| 57 | IBIAS | passive | Isolated interface current bias; tie through a resistor divider to V- to set the output current, with the pin at 2 V when isoSPI is enabled and IPA/IMA or IPB/IMB drive set to 20 times IB. |+| 58 | ICMP | passive | Isolated interface comparator threshold set; tie to a resistor divider between IBIAS and V- so the receiver thresholds equal half the ICMP voltage. |+| 59 | V- | power_in | Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC. |+| 60 | V- | power_in | Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC. |+| 61 | IMA | bidirectional | Isolated 2-wire serial interface port A negative terminal; IMA and IPA form a differential input/output pair. |+| 62 | IPA | bidirectional | Isolated 2-wire serial interface port A positive terminal; IPA and IMA form a differential input/output pair. |+| 63 | IMB | bidirectional | Isolated 2-wire serial interface port B negative terminal; IMB and IPB form a differential input/output pair. |+| 64 | IPB | bidirectional | Isolated 2-wire serial interface port B positive terminal; IPB and IMB form a differential input/output pair. |+| 65 | EPAD | power_in | Exposed pad (V-) that must be soldered to the PCB and connected to the V- plane for thermal management. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | LQFP-64-EP(10x10) |+| Category | Power Management (PMIC) |+| Pins | 65 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| TME in Normal Mode, C(n) to C(n-1) = 2.0 | | -2.6 | | 2.6 | mV | C(n) to C(n-1) = 2.0 | 4 |+| TME in Normal Mode, C(n) to C(n-1) = 3.3 | | -3 | | 3 | mV | C(n) to C(n-1) = 3.3 | 4 |+| TME in Normal Mode, C(n) to C(n-1) = 4.2 | | -3.8 | | 3.8 | mV | C(n) to C(n-1) = 4.2 | 4 |+| TME in Normal Mode, GPIO(n) to V- = 5.0 | | -1 | | 1 | mV | C(n) to C(n-1), GPIO(n) to V- = 5.0 | 4 |+| TME in Normal Mode, sum of all cells | | -0.35 | 0.05 | 0.35 | % | Sum of all cells, apply over the full specified temperature range | 4 |+| TME in Normal Mode, VREG pin | | -1 | -0.15 | 0 | % | VREG pin, apply over the full specified temperature range | 4 |+| TME in Normal Mode, VREF2 pin | | -0.05 | 0.05 | 0.2 | % | VREF2 pin, apply over the full specified temperature range | 4 |+| TME in Normal Mode, digital supply VREGD | VREGD | -0.5 | 0.5 | 1.5 | % | Digital supply voltage, VREGD, apply over the full specified temperature range | 4 |+| TME in Filtered Mode, C(n) to C(n-1) = 2.0 | | -1.6 | | 1.6 | mV | C(n) to C(n-1) = 2.0 | 4 |+| TME in Filtered Mode, C(n) to C(n-1) = 4.2 | | -2.8 | | 2.8 | mV | C(n) to C(n-1) = 4.2 | 4 |+| TME in Fast Mode, C(n) to C(n-1), GPIO(n) to V- = 0 | | -2 | | 2 | mV | C(n) to C(n-1), GPIO(n) to V- = 0 | 4 |+| TME in Fast Mode, GPIO(n) to V- = 5.0 | | -10 | | 10 | mV | C(n) to C(n-1), GPIO(n) to V- = 5.0 | 4 |+| Input Range C0 | C0 | 0 | | 1 | V | Apply over the full specified temperature range | 5 |+| Input Range GPIO(n) | GPIO(n) | 0 | | 5 | V | GPIO(n), n = 1 to 9, apply over the full specified temperature range | 5 |+| Input Leakage Current (IL) When Inputs Are Not Being Measured, C(n) | IL | -250 | 10 | 250 | nA | C(n), n = 0 to 18, apply over the full specified temperature range | 5 |+| Input Leakage Current (IL) When Inputs Are Not Being Measured, GPIO(n) | IL | -250 | 10 | 250 | nA | GPIO(n), n = 1 to 9, apply over the full specified temperature range | 5 |+| Input Current When Inputs Are Being Measured, C(n) | | -1 | | 1 | µA | C(n), n = 0 to 18; State: Core = Measure | 5 |+| Input Current When Inputs Are Being Measured, GPIO(n) | | -1 | | 1 | µA | GPIO(n), n = 1 to 9; State: Core = Measure | 5 |+| Input Current During Open Wire Detection | | 70 | 100 | 130 | µA | Apply over the full specified temperature range | 5 |+| 1st Reference Voltage (VREF1) | VREF1 | 3 | 3.15 | 3.3 | V | VREF1 pin, no load, apply over the full specified temperature range | 5 |+| 2nd Reference Voltage (VREF2) | VREF2 | 2.993 | 3 | 3.007 | V | VREF2 pin, no load, apply over the full specified temperature range | 5 |+| 2nd Reference Voltage (VREF2) with 5 kΩ load | VREF2 | 2.992 | 3 | 3.008 | V | VREF2 pin, 5 kΩ load to V−, apply over the full specified temperature range | 5 |+| V+ Supply Current (IVP), sleep | IVP | | 6.1 | 11 | µA | State: core = sleep, isoSPI = idle, VREG = 0 V | 5 |+| V+ Supply Current (IVP), sleep, VREG = 5 V | IVP | | 3 | 5 | µA | State: core = sleep, isoSPI = idle, VREG = 5 V | 5 |+| V+ Supply Current (IVP), standby | IVP | 9 | 14 | 22 | µA | State: core = standby | 5 |+| V+ Supply Current (IVP), standby, full temperature range | IVP | 6 | 14 | 28 | µA | State: core = standby, apply over the full specified temperature range | 5 |+| V+ Supply Current (IVP), measure | IVP | 0.65 | 0.95 | 1.35 | mA | State: core = measure | 5 |+| V+ Supply Current (IVP), measure, full temperature range | IVP | 0.6 | 0.95 | 1.4 | mA | State: core = measure, apply over the full specified temperature range | 6 |+| VREG Supply Current (IREG(CORE)), measure | IREG(CORE) | 14 | 15 | 16 | mA | State: core = measure | 6 |+| VREG Supply Current (IREG(CORE)), measure, full temperature range | IREG(CORE) | 13.5 | 15 | 16.5 | mA | State: core = measure, apply over the full specified temperature range | 6 |+| VREG Supply Current (IREG(CORE)), standby | IREG(CORE) | 10 | 35 | 60 | µA | State: core = standby | 6 |+| Additional VREG Supply Current (IREG(isoSPI)), ready | IREG(isoSPI) | 3.6 | 4.5 | 5.2 | mA | ISOMD = 0, RB1 + RB2 = 2 kΩ, ready, apply over the full specified temperature range | 6 |+| Additional VREG Supply Current (IREG(isoSPI)), active | IREG(isoSPI) | 5.6 | 6.8 | 8.1 | mA | ISOMD = 0, RB1 + RB2 = 2 kΩ, active, apply over the full specified temperature range | 6 |+| Data Return Delay (tRTN) | tRTN | 325 | 375 | 425 | ns | Apply over the full specified temperature range | 10 |+| V+ Supply Voltage | | 16 | 60 | 90 | V | TME specifications met, apply over the full specified temperature range | 6 |+| VREG Supply Voltage (VREG) | VREG | 4.5 | 5 | 5.5 | V | TME supply rejection < 1 mV/V, apply over the full specified temperature range | 6 |+| DRIVE Output Voltage, sourcing 1 µA | | 5.4 | 5.7 | 5.9 | V | Sourcing 1 µA | 6 |+| DRIVE Output Voltage, sourcing 1 µA, full temperature range | | 5.2 | 5.7 | 6.1 | V | Sourcing 1 µA, apply over the full specified temperature range | 6 |+| DRIVE Output Voltage, sourcing 500 µA, full temperature range | | 5.1 | 5.7 | 6.1 | V | Sourcing 500 µA, apply over the full specified temperature range | 6 |+| Digital Supply Voltage (VREGD) | VREGD | 2.7 | 3 | 3.6 | V | Apply over the full specified temperature range | 6 |+| Discharge Switch On Resistance | | | 4 | 10 | Ω | VCELL = 3.6 V, apply over the full specified temperature range | 6 |+| Input Voltage C0 (relative to V-) | C0 | -0.3 | | 6 | V | Relative to V- | 11 |+| Input Voltage C18 (relative to V-) | C18 | -0.3 | | | V | Relative to V-; max printed as MIN(V+ + 5.5 V, 112.5 V) | 11 |+| Input Voltage C(n), S(n) (relative to V-) | C(n), S(n) | -0.3 | | | V | Relative to V-; max printed as MIN(8 × n, 112.5 V) | 11 |+| Input Voltage IPA, IMA, IPB, IMB (relative to V-) | | -0.3 | | 6 | V | Upper limit VREG + 0.3 V, ≤ 6 V | 11 |+| Input Voltage DRIVE (relative to V-) | DRIVE | -0.3 | | 7 | V | Relative to V- | 11 |+| Input Voltage All Other Pins (relative to V-) | | -0.3 | | 6 | V | Relative to V- | 11 |+| Voltage Between Inputs C(n) to C(n-1) and S(n) to C(n-1) | | -0.3 | | 8 | V | C(n) to C(n-1) and S(n) to C(n-1) | 11 |+| Voltage Between Inputs C18 to C15, C15 to C12, C12 to C9, C9 to C6, C6 to C3, C3 to C0 | | -0.3 | | 21 | V | C18 to C15, C15 to C12, C12 to C9, C9 to C6, C6 to C3, and C3 to C0 | 11 |+| Total Supply Voltage, V+ to V- | V+ to V- | | | 112.5 | V | | 11 |+| Supply Voltage (Relative to C12), V+ to C12 | V+ to C12 | | | 50 | V | | 11 |+| Current In and Out of Pins (all pins except VREG, IPA, IMA, IPB, IMB, C(n), S(n)) | | | | 10 | mA | Current in and out of pins | 11 |+| Current In and Out of Pins, IPA, IMA, IPB, IMB | | | | 30 | mA | Current in and out of pins | 11 |+| Specified Junction Temperature Range | | -40 | | 85 | °C | Row names ADBMS1818ASWZ and ADBMSASWAZ | 11 |+| Junction Temperature (TJMAX) | TJMAX | | | 150 | °C | | 11 |+| Storage Temperature Range | | -65 | | 150 | °C | | 11 |+| ESD Withstand, Human Body Model (HBM) | HBM | -1000 | | 1000 | V | Human body model per ANSI/ESDA/JEDEC JS-001; class 1C | 11 |+| ESD Withstand, Charged Device Model (CDM) | CDM | -750 | | 750 | V | CDM per ANSI/ESDA/JEDEC JS-002; class C2b | 11 |+| Thermal Resistance, junction to ambient (SW-64-2) | θJA | | 17 | | °C/W | | 11 |+| Thermal Resistance, junction to case (SW-64-2) | θJC | | 2.5 | | °C/W | | 11 |++## CAD (KiCad official)++- Symbol: `ADBMS1818ASWAZ-R7`+- Footprint: `Package_QFP:LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm`+- 3D model: LQFP-64-EP(10x10) (KiCad packages3D, STEP)+- 3D model files: `adbms1818aswaz-r7-etched.step` / `adbms1818aswaz-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adbms1818aswaz-r7.step` / `adbms1818aswaz-r7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600620513408393216) (92 pp, sha256 `36b07646ed2930be`, retrieved 2026-10-19, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/adbms1818aswaz-r7-datasheet.pdf)
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adbms1818aswaz-r7.glbadded⋯ 1 unchanged line ⋯
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size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-7.000" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="ADBMS1818ASWAZ-R7">+ <wire x1="-12.7" y1="43.18" x2="12.7" y2="43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="43.18" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="43.18" width="0.254" layer="94"/>+ <text x="0.0000" y="45.7200" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="V+" x="-17.78" y="40.64" length="middle" direction="pwr"/>+ <pin name="C0" x="-17.78" y="38.1" length="middle" direction="in"/>+ <pin name="S1" x="-17.78" y="35.56" length="middle" direction="pas"/>+ <pin name="C1" x="-17.78" y="33.02" length="middle" direction="in"/>+ <pin name="S2" x="-17.78" y="30.48" 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rot="R180"/>+ <pin name="SDI" x="17.78" y="7.62" length="middle" direction="in" rot="R180"/>+ <pin name="DTEN" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/>+ <pin name="VREF1" x="17.78" y="2.54" length="middle" direction="out" rot="R180"/>+ <pin name="VREF2" x="17.78" y="0" length="middle" direction="out" rot="R180"/>+ <pin name="DRIVE" x="17.78" y="-2.54" length="middle" direction="out" rot="R180"/>+ <pin name="VREG" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>+ <pin name="GPIO9" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO8" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO7" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO6" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO5" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO4" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO3" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO2" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="GPIO1" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="C18" x="17.78" y="-30.48" length="middle" direction="in" rot="R180"/>+ <pin name="S18" x="17.78" y="-33.02" length="middle" direction="pas" rot="R180"/>+ <pin name="C17" x="17.78" y="-35.56" length="middle" direction="in" rot="R180"/>+ <pin name="S17" x="17.78" y="-38.1" length="middle" direction="pas" rot="R180"/>+ <pin name="C16" x="17.78" y="-40.64" length="middle" direction="in" rot="R180"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="ADBMS1818ASWAZ-R7" prefix="U">+ <description></description>+ <gates>+ <gate name="G$1" symbol="ADBMS1818ASWAZ-R7" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm">+ <connects>+ <connect gate="G$1" pin="V+" pad="1"/>+ <connect gate="G$1" pin="C0" pad="2"/>+ <connect gate="G$1" pin="S1" pad="3"/>+ <connect gate="G$1" pin="C1" pad="4"/>+ <connect gate="G$1" pin="S2" pad="5"/>+ <connect gate="G$1" pin="C2" pad="6"/>+ <connect gate="G$1" pin="S3" pad="7"/>+ <connect gate="G$1" pin="C3" pad="8"/>+ <connect gate="G$1" pin="S4" pad="9"/>+ <connect gate="G$1" pin="C4" pad="10"/>+ <connect gate="G$1" pin="S5" pad="11"/>+ <connect gate="G$1" pin="C5" pad="12"/>+ <connect gate="G$1" pin="S6" pad="13"/>+ <connect gate="G$1" pin="C6" pad="14"/>+ <connect gate="G$1" pin="S7" pad="15"/>+ <connect gate="G$1" pin="C7" pad="16"/>+ <connect gate="G$1" pin="S8" pad="17"/>+ <connect gate="G$1" pin="C8" pad="18"/>+ <connect gate="G$1" pin="S9" pad="19"/>+ <connect gate="G$1" pin="C9" pad="20"/>+ <connect gate="G$1" pin="S10" pad="21"/>+ <connect gate="G$1" pin="C10" pad="22"/>+ <connect gate="G$1" pin="S11" pad="23"/>+ <connect gate="G$1" pin="C11" pad="24"/>+ <connect gate="G$1" pin="S12" pad="25"/>+ <connect gate="G$1" pin="C12" pad="26"/>+ <connect gate="G$1" pin="S13" pad="27"/>+ <connect gate="G$1" pin="C13" pad="28"/>+ <connect gate="G$1" pin="S14" pad="29"/>+ <connect gate="G$1" pin="C14" pad="30"/>+ <connect gate="G$1" pin="S15" pad="31"/>+ <connect gate="G$1" pin="C15" pad="32"/>+ <connect gate="G$1" pin="S16" pad="33"/>+ <connect gate="G$1" pin="EPAD" pad="65"/>+ <connect gate="G$1" pin="IPB" pad="64"/>+ <connect gate="G$1" pin="IMB" pad="63"/>+ <connect gate="G$1" pin="IPA" pad="62"/>+ <connect gate="G$1" pin="IMA" pad="61"/>+ <connect gate="G$1" pin="V" pad="60"/>+ <connect gate="G$1" pin="V@2" pad="59"/>+ <connect gate="G$1" pin="ICMP" pad="58"/>+ <connect gate="G$1" pin="IBIAS" pad="57"/>+ <connect gate="G$1" pin="WDT" pad="56"/>+ <connect gate="G$1" pin="ISOMD" pad="55"/>+ <connect gate="G$1" pin="SDO" pad="54"/>+ <connect gate="G$1" pin="SDI" pad="53"/>+ <connect gate="G$1" pin="DTEN" pad="52"/>+ <connect gate="G$1" pin="VREF1" pad="51"/>+ <connect gate="G$1" pin="VREF2" pad="50"/>+ <connect gate="G$1" pin="DRIVE" pad="49"/>+ <connect gate="G$1" pin="VREG" pad="48"/>+ <connect gate="G$1" pin="GPIO9" pad="47"/>+ <connect gate="G$1" pin="GPIO8" pad="46"/>+ <connect gate="G$1" pin="GPIO7" pad="45"/>+ <connect gate="G$1" pin="GPIO6" pad="44"/>+ <connect gate="G$1" pin="GPIO5" pad="43"/>+ <connect gate="G$1" pin="GPIO4" pad="42"/>+ <connect gate="G$1" pin="GPIO3" pad="41"/>+ <connect gate="G$1" pin="GPIO2" pad="40"/>+ <connect gate="G$1" pin="GPIO1" pad="39"/>+ <connect gate="G$1" pin="C18" pad="38"/>+ <connect gate="G$1" pin="S18" pad="37"/>+ <connect gate="G$1" pin="C17" pad="36"/>+ <connect gate="G$1" pin="S17" pad="35"/>+ <connect gate="G$1" pin="C16" pad="34"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
adbms1818aswaz-r7.stepadded+20268@@ -0,0 +1,20268 @@+ISO-10303-21;+HEADER;+/* LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm.step 3D STEP model for use in ECAD systems+ * Copyright (C) 2025, KiCAD+ *+ * This work is licensed under the+ * [Creative Commons CC-BY-SA 4.0 License](https://creativecommons.org/licenses/by-sa/4.0/legalcode),+ * with the following exception:+ *+ * To the extent that the creation of electronic designs that use 'Licensed Material' can be+ * considered to be 'Adapted Material', then the copyright holder waives article 3 of the license+ * with respect to these designs and any generated files which use data provided as part of the+ * 'Licensed Material'.+ *+ * You are free to use the library data in your own projects without the obligation to share your+ * project files under this or any other license agreement. However, if you wish to distribute+ * these libraries, or parts thereof (including in modified form) as a collection then the exception+ * above does not apply. Please refer to+ * https://gitlab.com/kicad/libraries/kicad-packages3D/-/blob/master/LICENSE.md for further clarification+ * of the exception.+ *+ * Disclaimer of Warranties and Limitation of Liability.+ * These libraries are provided in the hope that they will be useful, but are provided without warranty of any kind, express or implied.+ * USE 3D CAD DATA AT YOUR OWN RISK+ * DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.+ */++FILE_DESCRIPTION(+/* description */ ('model of LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm'),+/* implementation_level */ '2;1');++FILE_NAME(+/* name */ 'LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm.step',+/* time_stamp */ '1970-01-01T00:00:00',+/* author */ ('KiCAD','kicad'),+/* organization */ ('OCCT'),+/* preprocessor_version */ '',+/* originating_system */ 'KiCAD',+/* authorisation */ '');++FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;++DATA;+#1=APPLICATION_PROTOCOL_DEFINITION('international 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BOUNDED_SURFACE() B_SPLINE_SURFACE(2,2,((#33,#34,#35,#36,#37),(#254,#255,#256,#257,#258),(#231,#232,#233,#234,#235)),.UNSPECIFIED.,.F.,.F.,.F.) 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B_SPLINE_SURFACE_WITH_KNOTS((3,3),(3,1,1,3),(0.,0.176724109503),(-0.21620361581,-3.998243295584E-02,0.136741676547,0.312962859401),.UNSPECIFIED.) GEOMETRIC_REPRESENTATION_ITEM() RATIONAL_B_SPLINE_SURFACE(((1.,1.,1.,1.,1.),(0.781002645201,0.781002645201,0.781002645201,0.781002645201,0.781002645201),(1.,1.,1.,1.,1.))) REPRESENTATION_ITEM('') SURFACE() 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BOUNDED_SURFACE() B_SPLINE_SURFACE(2,2,((#930,#931,#932,#933,#934),(#3973,#3974,#3975,#3976,#3977),(#1185,#1186,#1187,#1188,#1189)),.UNSPECIFIED.,.F.,.F.,.F.) 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B_SPLINE_SURFACE_WITH_KNOTS((3,3),(3,1,1,3),(0.,0.176724109503),(-0.21620361581,-3.998243295584E-02,0.136741676547,0.312962859401),.UNSPECIFIED.) GEOMETRIC_REPRESENTATION_ITEM() RATIONAL_B_SPLINE_SURFACE(((1.,1.,1.,1.,1.),(0.781002645201,0.781002645201,0.781002645201,0.781002645201,0.781002645201),(1.,1.,1.,1.,1.))) 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B_SPLINE_SURFACE_WITH_KNOTS((3,3),(3,1,1,3),(0.,0.176724109503),(-0.21620361581,-3.998243295584E-02,0.136741676547,0.312962859401),.UNSPECIFIED.) GEOMETRIC_REPRESENTATION_ITEM() RATIONAL_B_SPLINE_SURFACE(((1.,1.,1.,1.,1.),(0.781002645201,0.781002645201,0.781002645201,0.781002645201,0.781002645201),(1.,1.,1.,1.,1.))) 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B_SPLINE_SURFACE_WITH_KNOTS((3,3),(3,1,1,3),(0.,9.517816638234),(-0.502516801641,-4.048920165975E-02,9.477327436574,9.939355036556),.UNSPECIFIED.) GEOMETRIC_REPRESENTATION_ITEM() RATIONAL_B_SPLINE_SURFACE(((1.,1.,1.,1.,1.),(0.777145961457,0.777145961457,0.777145961457,0.777145961457,0.777145961457),(1.,1.,1.,1.,1.))) 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accuracy');+#19196=PRODUCT_RELATED_PRODUCT_CATEGORY('part',$,(#7));+#19197=MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(#19198,#19208,#19209,#19210,#19211,#19220,#19221,#19222,#19223,#19224,#19225,#19226,#19227,#19228,#19229,#19230,#19231,#19232,#19233,#19234,#19235,#19236,#19237,#19238,#19239,#19240,#19241,#19242,#19243,#19244,#19245,#19246,#19247,#19248,#19249,#19250,#19251,#19252,#19253,#19254,#19255,#19256,#19257,#19258,#19259,#19260,#19261,#19262,#19263,#19264,#19265,#19266,#19267,#19268,#19269,#19270,#19271,#19272,#19273,#19274,#19275,#19276,#19277,#19278,#19279,#19280,#19281,#19282,#19283,#19284,#19285,#19286,#19287,#19288,#19289,#19290,#19291,#19292,#19293,#19294,#19295,#19296,#19297,#19298,#19299,#19300,#19301,#19302,#19303,#19304,#19305,#19306,#19307,#19308,#19309,#19310,#19311,#19312,#19313,#19314,#19315,#19316,#19317,#19318,#19319,#19320,#19321,#19322,#19323,#19324,#19325,#19326,#19327,#19328,#19329,#19330,#19331,#19332,#19333,#19334,#19335,#19336,#19337,#19338,#19339,#19340,#19341,#19342,#19343,#19344,#19345,#19346,#19347,#19348,#19349,#19350,#19351,#19352,#19353,#19354,#19355,#19356,#19357,#19358,#19359,#19360,#19361,#19362,#19363,#19364,#19365,#19374,#19375,#19376,#19377,#19378,#19379,#19380,#19381,#19382,#19383,#19384,#19385,#19386,#19387,#19388,#19389,#19390,#19391,#19392,#19393,#19394,#19395,#19396,#19397,#19398,#19399,#19400,#19401,#19402,#19403,#19404,#19405,#19406,#19407,#19408,#19409,#19410,#19411,#19412,#19413,#19414,#19415,#19416,#19417,#19418,#19419,#19420,#19421,#19422,#19423,#19424,#19425,#19426,#19427,#19428,#19429,#19430,#19431,#19432,#19433,#19434,#19435,#19436,#19437,#19438,#19439,#19440,#19441,#19442,#19443,#19444,#19445,#19446,#19447,#19448,#19449,#19450,#19451,#19452,#19453,#19454,#19455,#19456,#19457,#19458,#19459,#19460,#19461,#19462,#19463,#19464,#19465,#19466,#19467,#19468,#19469,#19470,#19471,#19472,#19473,#19474,#19475,#19476,#19477,#19478,#19479,#19480,#19481,#19482,#19483,#19484,#19485,#19486,#19487,#19488,#19489,#19490,#19491,#19492,#19493,#19494,#19495,#19496,#19497,#19498,#19499,#19500,#19501,#19502,#19503,#19504,#19505,#19506,#19507,#19508,#19509,#19510,#19511,#19512,#19513,#19514,#19515,#19516,#19517,#19518,#19519,#19520,#19521,#19522,#19523,#19524,#19525,#19526,#19527,#19528,#19529,#19530,#19531,#19532,#19533,#19534,#19535,#19536,#19537,#19538,#19539,#19540,#19541,#19542,#19543,#19544,#19545,#19546,#19547,#19548,#19549,#19550,#19551,#19552,#19553,#19554,#19555,#19556,#19557,#19558,#19559,#19560,#19561,#19562,#19563,#19564,#19565,#19566,#19567,#19568,#19569,#19570,#19571,#19572,#19573,#19574,#19575,#19576,#19577,#19578,#19579,#19580,#19581,#19582,#19583,#19584,#19585,#19586,#19587,#19588,#19589,#19590,#19591,#19592,#19593,#19594,#19595,#19596,#19597,#19598,#19599,#19600,#19601,#19602,#19603,#19604,#19605,#19606,#19607,#19608,#19609,#19610,#19611,#19612,#19613,#19614,#19615,#19616,#19617,#19618,#19619,#19620,#19621,#19622,#19623,#19624,#19625,#19626,#19627,#19628,#19629,#19630,#19631,#19632,#19633,#19634,#19635,#19636,#19637,#19638,#19639,#19640,#19641,#19642,#19643,#19644,#19645,#19646,#19647,#19648,#19649,#19650,#19651,#19652,#19653,#19654,#19655,#19656,#19657,#19658,#19659,#19660,#19661,#19662,#19663,#19664,#19665,#19666,#19667,#19668,#19669,#19670,#19671,#19672,#19673,#19674,#19675,#19676,#19677,#19678,#19679,#19680,#19681,#19682,#19683,#19684,#19685,#19686,#19687,#19688,#19689,#19690,#19691,#19692,#19693,#19694,#19695,#19696,#19697,#19698,#19699,#19700,#19701,#19702,#19703,#19704,#19705,#19706,#19707,#19708,#19709,#19710,#19711,#19712,#19713,#19714,#19715,#19716,#19717,#19718,#19719,#19720,#19721,#19722,#19723,#19724,#19725,#19726,#19727,#19728,#19729,#19730,#19731,#19732,#19733,#19734,#19735,#19736,#19737,#19738,#19739,#19740,#19741,#19742,#19743,#19744,#19745,#19746,#19747,#19748,#19749,#19750,#19751,#19752,#19753,#19754,#19755,#19756,#19757,#19758,#19759,#19760,#19761,#19762,#19763,#19764,#19765,#19766,#19767,#19768,#19769,#19770,#19771,#19772,#19773,#19774,#19775,#19776,#19777,#19778,#19779,#19780,#19781,#19782,#19783,#19784,#19785,#19786,#19787,#19788,#19789,#19790,#19791,#19792,#19793,#19794,#19795,#19796,#19797,#19798,#19799,#19800,#19801,#19802,#19803,#19804,#19805,#19806,#19807,#19808,#19809,#19810,#19811,#19812,#19813,#19814,#19815,#19816,#19817,#19818,#19819,#19820,#19821,#19822,#19823,#19824,#19825,#19826,#19827,#19828,#19829,#19830,#19831,#19832,#19833,#19834,#19835,#19836,#19837,#19838,#19839,#19840,#19841,#19842,#19843,#19844,#19845,#19846,#19847,#19848,#19849,#19850,#19851,#19852,#19853,#19854,#19855,#19856,#19857,#19858,#19859,#19860,#19861,#19862,#19863,#19864,#19865,#19866,#19867,#19868,#19869,#19870,#19871,#19872,#19873,#19874,#19875,#19876,#19877,#19878,#19879,#19880,#19881,#19882,#19883,#19884,#19885,#19886,#19887,#19888,#19889,#19890,#19891,#19892,#19893,#19894,#19895,#19896,#19897,#19898,#19899,#19900,#19901,#19902,#19903,#19904,#19905,#19906,#19907,#19908,#19909,#19910,#19911,#19912,#19913,#19914,#19915,#19916,#19917,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package.jsonadded+538@@ -0,0 +1,538 @@+{+ "slug": "adbms1818aswaz-r7",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Battery Management, LQFP-64-EP(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "adbms1818aswaz-r7",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "adbms1818aswaz-r7.kicad_sym",+ "adbms1818aswaz-r7.kicad_mod",+ "adbms1818aswaz-r7.glb",+ "adbms1818aswaz-r7.step",+ "adbms1818aswaz-r7.lbr",+ "docs/hero.png",+ "docs/adbms1818aswaz-r7-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "adbms1818aswaz-r7-hero.glb",+ "adbms1818aswaz-r7-hero.overlay.json",+ "adbms1818aswaz-r7-etched.glb"+ ],+ "component": {+ "mpn": "ADBMS1818ASWAZ-R7",+ "manufacturer": "Analog Devices",+ "package": "LQFP-64-EP(10x10)",+ "pin_count": 65,+ "category": "Power Management (PMIC)",+ "subcategory": "Battery Management",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600620513408393216",+ "parts": {+ "symbol": "adbms1818aswaz-r7.kicad_sym",+ "footprint": "adbms1818aswaz-r7.kicad_mod",+ "model_3d": "adbms1818aswaz-r7-hero.glb",+ "model_3d_plain": "adbms1818aswaz-r7-etched.glb",+ "model_3d_step": "adbms1818aswaz-r7-etched.step",+ "model_3d_step_plain": "adbms1818aswaz-r7.step",+ "lbr": "adbms1818aswaz-r7.lbr"+ },+ "distributor_links": {+ "lcsc": "C7455595",+ "digikey": "505-ADBMS1818ASWAZ-R7TR-ND",+ "mouser": "584-ADBMS1818ASWAZR7"+ },+ "distributor_check": {+ "checked_at": "2026-10-19T10:26:09Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "505-ADBMS1818ASWAZ-R7TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "584-ADBMS1818ASWAZR7",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "V+",+ "type": "power_in",+ "description": "Positive supply pin; total supply voltage V+ to V- is rated to 112.5 V absolute maximum."+ },+ {+ "number": "2",+ "name": "C0",+ "type": "input",+ "description": "Cell input C0; input voltage relative to V- is limited to -0.3 V to +6 V."+ },+ {+ "number": "3",+ "name": "S1",+ "type": "passive",+ "description": "Balance input/output S1, connected through an internal N-channel discharge MOSFET between S1 and C0; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1."+ },+ {+ "number": "4",+ "name": "C1",+ "type": "input",+ "description": "Cell input C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1."+ },+ {+ "number": "5",+ "name": "S2",+ "type": "passive",+ "description": "Balance input/output S2, connected through an internal N-channel discharge MOSFET between S2 and C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2."+ },+ {+ "number": "6",+ "name": "C2",+ "type": "input",+ "description": "Cell input C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2."+ },+ {+ "number": "7",+ "name": "S3",+ "type": "passive",+ "description": "Balance input/output S3, connected through an internal N-channel discharge MOSFET between S3 and C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3."+ },+ {+ "number": "8",+ "name": "C3",+ "type": "input",+ "description": "Cell input C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3."+ },+ {+ "number": "9",+ "name": "S4",+ "type": "passive",+ "description": "Balance input/output S4, connected through an internal N-channel discharge MOSFET between S4 and C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4."+ },+ {+ "number": "10",+ "name": "C4",+ "type": "input",+ "description": "Cell input C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4."+ },+ {+ "number": "11",+ "name": "S5",+ "type": "passive",+ "description": "Balance input/output S5, connected through an internal N-channel discharge MOSFET between S5 and C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5."+ },+ {+ "number": "12",+ "name": "C5",+ "type": "input",+ "description": "Cell input C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5."+ },+ {+ "number": "13",+ "name": "S6",+ "type": "passive",+ "description": "Balance input/output S6, connected through an internal N-channel discharge MOSFET between S6 and C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6."+ },+ {+ "number": "14",+ "name": "C6",+ "type": "input",+ "description": "Cell input C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6."+ },+ {+ "number": "15",+ "name": "S7",+ "type": "passive",+ "description": "Balance input/output S7, connected through an internal N-channel discharge MOSFET between S7 and C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7."+ },+ {+ "number": "16",+ "name": "C7",+ "type": "input",+ "description": "Cell input C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7."+ },+ {+ "number": "17",+ "name": "S8",+ "type": "passive",+ "description": "Balance input/output S8, connected through an internal N-channel discharge MOSFET between S8 and C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8."+ },+ {+ "number": "18",+ "name": "C8",+ "type": "input",+ "description": "Cell input C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8."+ },+ {+ "number": "19",+ "name": "S9",+ "type": "passive",+ "description": "Balance input/output S9, connected through an internal N-channel discharge MOSFET between S9 and C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9."+ },+ {+ "number": "20",+ "name": "C9",+ "type": "input",+ "description": "Cell input C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9."+ },+ {+ "number": "21",+ "name": "S10",+ "type": "passive",+ "description": "Balance input/output S10, connected through an internal N-channel discharge MOSFET between S10 and C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10."+ },+ {+ "number": "22",+ "name": "C10",+ "type": "input",+ "description": "Cell input C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10."+ },+ {+ "number": "23",+ "name": "S11",+ "type": "passive",+ "description": "Balance input/output S11, connected through an internal N-channel discharge MOSFET between S11 and C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11."+ },+ {+ "number": "24",+ "name": "C11",+ "type": "input",+ "description": "Cell input C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11."+ },+ {+ "number": "25",+ "name": "S12",+ "type": "passive",+ "description": "Balance input/output S12, connected through an internal N-channel discharge MOSFET between S12 and C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12."+ },+ {+ "number": "26",+ "name": "C12",+ "type": "input",+ "description": "Cell input C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12."+ },+ {+ "number": "27",+ "name": "S13",+ "type": "passive",+ "description": "Balance input/output S13, connected through an internal N-channel discharge MOSFET between S13 and C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13."+ },+ {+ "number": "28",+ "name": "C13",+ "type": "input",+ "description": "Cell input C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13."+ },+ {+ "number": "29",+ "name": "S14",+ "type": "passive",+ "description": "Balance input/output S14, connected through an internal N-channel discharge MOSFET between S14 and C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14."+ },+ {+ "number": "30",+ "name": "C14",+ "type": "input",+ "description": "Cell input C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14."+ },+ {+ "number": "31",+ "name": "S15",+ "type": "passive",+ "description": "Balance input/output S15, connected through an internal N-channel discharge MOSFET between S15 and C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15."+ },+ {+ "number": "32",+ "name": "C15",+ "type": "input",+ "description": "Cell input C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15."+ },+ {+ "number": "33",+ "name": "S16",+ "type": "passive",+ "description": "Balance input/output S16, connected through an internal N-channel discharge MOSFET between S16 and C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16."+ },+ {+ "number": "34",+ "name": "C16",+ "type": "input",+ "description": "Cell input C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16."+ },+ {+ "number": "35",+ "name": "S17",+ "type": "passive",+ "description": "Balance input/output S17, connected through an internal N-channel discharge MOSFET between S17 and C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17."+ },+ {+ "number": "36",+ "name": "C17",+ "type": "input",+ "description": "Cell input C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17."+ },+ {+ "number": "37",+ "name": "S18",+ "type": "passive",+ "description": "Balance input/output S18, connected through an internal N-channel discharge MOSFET between S18 and C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 18."+ },+ {+ "number": "38",+ "name": "C18",+ "type": "input",+ "description": "Cell input C18; input voltage relative to V- is limited to -0.3 V to MIN(V+ + 5.5 V, 112.5 V)."+ },+ {+ "number": "39",+ "name": "GPIO1",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "40",+ "name": "GPIO2",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "41",+ "name": "GPIO3",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "42",+ "name": "GPIO4",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "43",+ "name": "GPIO5",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "44",+ "name": "GPIO6",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "45",+ "name": "GPIO7",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "46",+ "name": "GPIO8",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "47",+ "name": "GPIO9",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "48",+ "name": "VREG",+ "type": "power_out",+ "description": "5 V regulator pin; bypass with an external 1 uF capacitor."+ },+ {+ "number": "49",+ "name": "DRIVE",+ "type": "output",+ "description": "Drive pin for an external NPN transistor: connect its base to DRIVE, collector to V+, and emitter to VREG."+ },+ {+ "number": "50",+ "name": "VREF2",+ "type": "power_out",+ "description": "Buffered second reference voltage for driving multiple 10 kOhm thermistors; bypass with an external 1 uF capacitor."+ },+ {+ "number": "51",+ "name": "VREF1",+ "type": "power_out",+ "description": "ADC reference voltage; bypass with an external 1 uF capacitor and no DC loads are allowed."+ },+ {+ "number": "52",+ "name": "DTEN",+ "type": "input",+ "description": "Discharge timer enable; connect to VREG to enable the discharge timer."+ },+ {+ "number": "53",+ "name": "SDI",+ "type": "input",+ "description": "4-wire SPI serial data input (digital input); in isoSPI mode (ISOMD tied to VREG) this pin is not used."+ },+ {+ "number": "54",+ "name": "SDO",+ "type": "output",+ "description": "4-wire SPI serial data output, an open-drain NMOS output that requires a 5 kOhm pull-up resistor."+ },+ {+ "number": "55",+ "name": "ISOMD",+ "type": "input",+ "description": "Serial interface mode select: tie to VREG for 2-wire isoSPI mode or to V- for 4-wire SPI mode."+ },+ {+ "number": "56",+ "name": "WDT",+ "type": "output",+ "description": "Watchdog timer output, an open-drain NMOS; it goes high impedance if no valid command is received within 2 seconds, and may be left disconnected or pulled to VREG through 1 MOhm."+ },+ {+ "number": "57",+ "name": "IBIAS",+ "type": "passive",+ "description": "Isolated interface current bias; tie through a resistor divider to V- to set the output current, with the pin at 2 V when isoSPI is enabled and IPA/IMA or IPB/IMB drive set to 20 times IB."+ },+ {+ "number": "58",+ "name": "ICMP",+ "type": "passive",+ "description": "Isolated interface comparator threshold set; tie to a resistor divider between IBIAS and V- so the receiver thresholds equal half the ICMP voltage."+ },+ {+ "number": "59",+ "name": "V–",+ "type": "power_in",+ "description": "Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC."+ },+ {+ "number": "60",+ "name": "V–",+ "type": "power_in",+ "description": "Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC."+ },+ {+ "number": "61",+ "name": "IMA",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port A negative terminal; IMA and IPA form a differential input/output pair."+ },+ {+ "number": "62",+ "name": "IPA",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port A positive terminal; IPA and IMA form a differential input/output pair."+ },+ {+ "number": "63",+ "name": "IMB",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port B negative terminal; IMB and IPB form a differential input/output pair."+ },+ {+ "number": "64",+ "name": "IPB",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port B positive terminal; IPB and IMB form a differential input/output pair."+ },+ {+ "number": "65",+ "name": "EPAD",+ "type": "power_in",+ "description": "Exposed pad (V-) that must be soldered to the PCB and connected to the V- plane for thermal management."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package mismatch: the package hint says LQFP-64-EP (10x10), but the ordering guide lists ADBMS1818AS; Pins 53, 54, 61 and 62 are assigned differently in Table 14 and Table 15. Table 14 lists SDI, SDO, C; Pin 53 SDI and pin 54 SDO follow the Table 14 order; the Table 15 ISOMD=V- column suggests pin 53 = ",+ "30/65 pins cited to the wrong page (name found elsewhere): ['10:C4@p12', '11:S5@p12', '12:C5@p12', '13:S6@p12']"+ ],+ "pages_sent": 8,+ "cost_usd": 0.1017,+ "at": "2026-10-19T10:25:42"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600620513408393216",+ "pages": 92,+ "sha256": "36b07646ed2930be",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 65,+ "described": 65,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "adbms1818aswaz-r7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12.0,+ 12.0,+ 1.5+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "dde48e46dd3f1a46fe776b812b79969568eaeab6936a6859662cd3193f2cd505",+ "checked": "2026-10-19",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "adbms1818aswaz-r7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12.0,+ 12.0,+ 1.5+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "d74ff7052f354f59522d855bcdb474c7976d14033f12fce1a63bab7731623c0f",+ "checked": "2026-10-19",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ }+}
page.jsonadded+544@@ -0,0 +1,544 @@+{+ "slug": "adbms1818aswaz-r7",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Battery Management, LQFP-64-EP(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "adbms1818aswaz-r7",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "adbms1818aswaz-r7.kicad_sym",+ "adbms1818aswaz-r7.kicad_mod",+ "adbms1818aswaz-r7.glb",+ "adbms1818aswaz-r7.step",+ "adbms1818aswaz-r7.lbr",+ "docs/hero.png",+ "docs/adbms1818aswaz-r7-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "adbms1818aswaz-r7-hero.glb",+ "adbms1818aswaz-r7-hero.overlay.json",+ "adbms1818aswaz-r7-etched.glb"+ ],+ "component": {+ "mpn": "ADBMS1818ASWAZ-R7",+ "manufacturer": "Analog Devices",+ "package": "LQFP-64-EP(10x10)",+ "pin_count": 65,+ "category": "Power Management (PMIC)",+ "subcategory": "Battery Management",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600620513408393216",+ "parts": {+ "symbol": "adbms1818aswaz-r7.kicad_sym",+ "footprint": "adbms1818aswaz-r7.kicad_mod",+ "model_3d": "adbms1818aswaz-r7-hero.glb",+ "model_3d_plain": "adbms1818aswaz-r7-etched.glb",+ "model_3d_step": "adbms1818aswaz-r7-etched.step",+ "model_3d_step_plain": "adbms1818aswaz-r7.step",+ "lbr": "adbms1818aswaz-r7.lbr"+ },+ "distributor_links": {+ "lcsc": "C7455595",+ "digikey": "505-ADBMS1818ASWAZ-R7TR-ND",+ "mouser": "584-ADBMS1818ASWAZR7"+ },+ "distributor_check": {+ "checked_at": "2026-10-19T10:26:09Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "505-ADBMS1818ASWAZ-R7TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "584-ADBMS1818ASWAZR7",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "V+",+ "type": "power_in",+ "description": "Positive supply pin; total supply voltage V+ to V- is rated to 112.5 V absolute maximum."+ },+ {+ "number": "2",+ "name": "C0",+ "type": "input",+ "description": "Cell input C0; input voltage relative to V- is limited to -0.3 V to +6 V."+ },+ {+ "number": "3",+ "name": "S1",+ "type": "passive",+ "description": "Balance input/output S1, connected through an internal N-channel discharge MOSFET between S1 and C0; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1."+ },+ {+ "number": "4",+ "name": "C1",+ "type": "input",+ "description": "Cell input C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 1."+ },+ {+ "number": "5",+ "name": "S2",+ "type": "passive",+ "description": "Balance input/output S2, connected through an internal N-channel discharge MOSFET between S2 and C1; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2."+ },+ {+ "number": "6",+ "name": "C2",+ "type": "input",+ "description": "Cell input C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 2."+ },+ {+ "number": "7",+ "name": "S3",+ "type": "passive",+ "description": "Balance input/output S3, connected through an internal N-channel discharge MOSFET between S3 and C2; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3."+ },+ {+ "number": "8",+ "name": "C3",+ "type": "input",+ "description": "Cell input C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 3."+ },+ {+ "number": "9",+ "name": "S4",+ "type": "passive",+ "description": "Balance input/output S4, connected through an internal N-channel discharge MOSFET between S4 and C3; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4."+ },+ {+ "number": "10",+ "name": "C4",+ "type": "input",+ "description": "Cell input C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 4."+ },+ {+ "number": "11",+ "name": "S5",+ "type": "passive",+ "description": "Balance input/output S5, connected through an internal N-channel discharge MOSFET between S5 and C4; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5."+ },+ {+ "number": "12",+ "name": "C5",+ "type": "input",+ "description": "Cell input C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 5."+ },+ {+ "number": "13",+ "name": "S6",+ "type": "passive",+ "description": "Balance input/output S6, connected through an internal N-channel discharge MOSFET between S6 and C5; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6."+ },+ {+ "number": "14",+ "name": "C6",+ "type": "input",+ "description": "Cell input C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 6."+ },+ {+ "number": "15",+ "name": "S7",+ "type": "passive",+ "description": "Balance input/output S7, connected through an internal N-channel discharge MOSFET between S7 and C6; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7."+ },+ {+ "number": "16",+ "name": "C7",+ "type": "input",+ "description": "Cell input C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 7."+ },+ {+ "number": "17",+ "name": "S8",+ "type": "passive",+ "description": "Balance input/output S8, connected through an internal N-channel discharge MOSFET between S8 and C7; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8."+ },+ {+ "number": "18",+ "name": "C8",+ "type": "input",+ "description": "Cell input C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 8."+ },+ {+ "number": "19",+ "name": "S9",+ "type": "passive",+ "description": "Balance input/output S9, connected through an internal N-channel discharge MOSFET between S9 and C8; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9."+ },+ {+ "number": "20",+ "name": "C9",+ "type": "input",+ "description": "Cell input C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 9."+ },+ {+ "number": "21",+ "name": "S10",+ "type": "passive",+ "description": "Balance input/output S10, connected through an internal N-channel discharge MOSFET between S10 and C9; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10."+ },+ {+ "number": "22",+ "name": "C10",+ "type": "input",+ "description": "Cell input C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 10."+ },+ {+ "number": "23",+ "name": "S11",+ "type": "passive",+ "description": "Balance input/output S11, connected through an internal N-channel discharge MOSFET between S11 and C10; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11."+ },+ {+ "number": "24",+ "name": "C11",+ "type": "input",+ "description": "Cell input C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 11."+ },+ {+ "number": "25",+ "name": "S12",+ "type": "passive",+ "description": "Balance input/output S12, connected through an internal N-channel discharge MOSFET between S12 and C11; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12."+ },+ {+ "number": "26",+ "name": "C12",+ "type": "input",+ "description": "Cell input C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 12."+ },+ {+ "number": "27",+ "name": "S13",+ "type": "passive",+ "description": "Balance input/output S13, connected through an internal N-channel discharge MOSFET between S13 and C12; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13."+ },+ {+ "number": "28",+ "name": "C13",+ "type": "input",+ "description": "Cell input C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 13."+ },+ {+ "number": "29",+ "name": "S14",+ "type": "passive",+ "description": "Balance input/output S14, connected through an internal N-channel discharge MOSFET between S14 and C13; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14."+ },+ {+ "number": "30",+ "name": "C14",+ "type": "input",+ "description": "Cell input C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 14."+ },+ {+ "number": "31",+ "name": "S15",+ "type": "passive",+ "description": "Balance input/output S15, connected through an internal N-channel discharge MOSFET between S15 and C14; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15."+ },+ {+ "number": "32",+ "name": "C15",+ "type": "input",+ "description": "Cell input C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 15."+ },+ {+ "number": "33",+ "name": "S16",+ "type": "passive",+ "description": "Balance input/output S16, connected through an internal N-channel discharge MOSFET between S16 and C15; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16."+ },+ {+ "number": "34",+ "name": "C16",+ "type": "input",+ "description": "Cell input C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 16."+ },+ {+ "number": "35",+ "name": "S17",+ "type": "passive",+ "description": "Balance input/output S17, connected through an internal N-channel discharge MOSFET between S17 and C16; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17."+ },+ {+ "number": "36",+ "name": "C17",+ "type": "input",+ "description": "Cell input C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 17."+ },+ {+ "number": "37",+ "name": "S18",+ "type": "passive",+ "description": "Balance input/output S18, connected through an internal N-channel discharge MOSFET between S18 and C17; input voltage relative to V- is limited to -0.3 V to MIN(8 x n, 112.5 V) with n = 18."+ },+ {+ "number": "38",+ "name": "C18",+ "type": "input",+ "description": "Cell input C18; input voltage relative to V- is limited to -0.3 V to MIN(V+ + 5.5 V, 112.5 V)."+ },+ {+ "number": "39",+ "name": "GPIO1",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "40",+ "name": "GPIO2",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "41",+ "name": "GPIO3",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "42",+ "name": "GPIO4",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "43",+ "name": "GPIO5",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input (range V- to 5 V), and can also serve as an I2C or SPI port."+ },+ {+ "number": "44",+ "name": "GPIO6",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "45",+ "name": "GPIO7",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "46",+ "name": "GPIO8",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "47",+ "name": "GPIO9",+ "type": "bidirectional",+ "description": "General-purpose I/O usable as digital input, digital output, or analog input with a measurement range from V- to 5 V."+ },+ {+ "number": "48",+ "name": "VREG",+ "type": "power_out",+ "description": "5 V regulator pin; bypass with an external 1 uF capacitor."+ },+ {+ "number": "49",+ "name": "DRIVE",+ "type": "output",+ "description": "Drive pin for an external NPN transistor: connect its base to DRIVE, collector to V+, and emitter to VREG."+ },+ {+ "number": "50",+ "name": "VREF2",+ "type": "power_out",+ "description": "Buffered second reference voltage for driving multiple 10 kOhm thermistors; bypass with an external 1 uF capacitor."+ },+ {+ "number": "51",+ "name": "VREF1",+ "type": "power_out",+ "description": "ADC reference voltage; bypass with an external 1 uF capacitor and no DC loads are allowed."+ },+ {+ "number": "52",+ "name": "DTEN",+ "type": "input",+ "description": "Discharge timer enable; connect to VREG to enable the discharge timer."+ },+ {+ "number": "53",+ "name": "SDI",+ "type": "input",+ "description": "4-wire SPI serial data input (digital input); in isoSPI mode (ISOMD tied to VREG) this pin is not used."+ },+ {+ "number": "54",+ "name": "SDO",+ "type": "output",+ "description": "4-wire SPI serial data output, an open-drain NMOS output that requires a 5 kOhm pull-up resistor."+ },+ {+ "number": "55",+ "name": "ISOMD",+ "type": "input",+ "description": "Serial interface mode select: tie to VREG for 2-wire isoSPI mode or to V- for 4-wire SPI mode."+ },+ {+ "number": "56",+ "name": "WDT",+ "type": "output",+ "description": "Watchdog timer output, an open-drain NMOS; it goes high impedance if no valid command is received within 2 seconds, and may be left disconnected or pulled to VREG through 1 MOhm."+ },+ {+ "number": "57",+ "name": "IBIAS",+ "type": "passive",+ "description": "Isolated interface current bias; tie through a resistor divider to V- to set the output current, with the pin at 2 V when isoSPI is enabled and IPA/IMA or IPB/IMB drive set to 20 times IB."+ },+ {+ "number": "58",+ "name": "ICMP",+ "type": "passive",+ "description": "Isolated interface comparator threshold set; tie to a resistor divider between IBIAS and V- so the receiver thresholds equal half the ICMP voltage."+ },+ {+ "number": "59",+ "name": "V–",+ "type": "power_in",+ "description": "Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC."+ },+ {+ "number": "60",+ "name": "V–",+ "type": "power_in",+ "description": "Negative supply pin; V- pins 59 and 60 must be shorted together externally to the IC."+ },+ {+ "number": "61",+ "name": "IMA",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port A negative terminal; IMA and IPA form a differential input/output pair."+ },+ {+ "number": "62",+ "name": "IPA",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port A positive terminal; IPA and IMA form a differential input/output pair."+ },+ {+ "number": "63",+ "name": "IMB",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port B negative terminal; IMB and IPB form a differential input/output pair."+ },+ {+ "number": "64",+ "name": "IPB",+ "type": "bidirectional",+ "description": "Isolated 2-wire serial interface port B positive terminal; IPB and IMB form a differential input/output pair."+ },+ {+ "number": "65",+ "name": "EPAD",+ "type": "power_in",+ "description": "Exposed pad (V-) that must be soldered to the PCB and connected to the V- plane for thermal management."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package mismatch: the package hint says LQFP-64-EP (10x10), but the ordering guide lists ADBMS1818AS; Pins 53, 54, 61 and 62 are assigned differently in Table 14 and Table 15. Table 14 lists SDI, SDO, C; Pin 53 SDI and pin 54 SDO follow the Table 14 order; the Table 15 ISOMD=V- column suggests pin 53 = ",+ "30/65 pins cited to the wrong page (name found elsewhere): ['10:C4@p12', '11:S5@p12', '12:C5@p12', '13:S6@p12']"+ ],+ "pages_sent": 8,+ "cost_usd": 0.1017,+ "at": "2026-10-19T10:25:42"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600620513408393216",+ "pages": 92,+ "sha256": "36b07646ed2930be",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 65,+ "described": 65,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "adbms1818aswaz-r7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "dde48e46dd3f1a46fe776b812b79969568eaeab6936a6859662cd3193f2cd505",+ "checked": "2026-10-19",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "adbms1818aswaz-r7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d74ff7052f354f59522d855bcdb474c7976d14033f12fce1a63bab7731623c0f",+ "checked": "2026-10-19",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}
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