component
ADAU1462WBCPZ300
Public Made by Adomby adom
Analog Devices Digital Signal Processors / Controllers (DSPs/DSCs), LFCSP-72(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "adau1462wbcpz300",
"version": "0.1.0",
"type": "component",
"description": "Analog Devices Digital Signal Processors / Controllers (DSPs/DSCs), LFCSP-72(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"adau1462wbcpz300",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"adau1462wbcpz300.kicad_sym",
"adau1462wbcpz300.kicad_mod",
"adau1462wbcpz300.glb",
"adau1462wbcpz300.step",
"adau1462wbcpz300.lbr",
"docs/hero.png",
"docs/adau1462wbcpz300-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"adau1462wbcpz300-hero.glb",
"adau1462wbcpz300-hero.overlay.json",
"adau1462wbcpz300-etched.glb"
],
"component": {
"mpn": "ADAU1462WBCPZ300",
"manufacturer": "Analog Devices",
"package": "LFCSP-72(10x10)",
"pin_count": 73,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Digital Signal Processors / Controllers (DSPs/DSCs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1462-1466.pdf",
"parts": {
"symbol": "adau1462wbcpz300.kicad_sym",
"footprint": "adau1462wbcpz300.kicad_mod",
"model_3d": "adau1462wbcpz300-hero.glb",
"model_3d_plain": "adau1462wbcpz300-etched.glb",
"model_3d_step": "adau1462wbcpz300-etched.step",
"model_3d_step_plain": "adau1462wbcpz300.step",
"lbr": "adau1462wbcpz300.lbr"
},
"distributor_links": {
"lcsc": "C654407",
"digikey": "505-ADAU1462WBCPZ300-ND",
"mouser": "584-ADAU1462WBCPZ300"
},
"distributor_check": {
"checked_at": "2026-10-30T20:54:41Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-ADAU1462WBCPZ300-ND",
"status": "found"
},
"mouser": {
"pn": "584-ADAU1462WBCPZ300",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "2",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V − 5% to 3.3 V + 10%, bypassed with decoupling capacitors to Pin 1 (DGND)."
},
{
"number": "3",
"name": "VDRIVE",
"type": "output",
"description": "Base drive bias output for the external PNP pass transistor of the digital supply regulator; connect to ground if DVDD is supplied externally."
},
{
"number": "4",
"name": "SPDIFIN",
"type": "input",
"description": "Input to the integrated S/PDIF receiver, internally biased to IOVDD/2; disconnect when not in use."
},
{
"number": "5",
"name": "SPDIFOUT",
"type": "output",
"description": "Configurable output from the integrated S/PDIF transmitter, internally biased to IOVDD/2; disconnect when not in use."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "7",
"name": "AVDD",
"type": "power_in",
"description": "Analog (auxiliary ADC) supply, must be 3.3 V ± 10%, bypassed to Pin 6 (AGND)."
},
{
"number": "8",
"name": "AUXADC0",
"type": "input",
"description": "Auxiliary ADC input channel 0 read for use in the DSP program; disconnect when not in use."
},
{
"number": "9",
"name": "AUXADC1",
"type": "input",
"description": "Auxiliary ADC input channel 1 read for use in the DSP program; disconnect when not in use."
},
{
"number": "10",
"name": "AUXADC2",
"type": "input",
"description": "Auxiliary ADC input channel 2 read for use in the DSP program; disconnect when not in use."
},
{
"number": "11",
"name": "AUXADC3",
"type": "input",
"description": "Auxiliary ADC input channel 3 read for use in the DSP program; disconnect when not in use."
},
{
"number": "12",
"name": "AUXADC4",
"type": "input",
"description": "Auxiliary ADC input channel 4 read for use in the DSP program; disconnect when not in use."
},
{
"number": "13",
"name": "AUXADC5",
"type": "input",
"description": "Auxiliary ADC input channel 5 read for use in the DSP program; disconnect when not in use."
},
{
"number": "14",
"name": "PGND",
"type": "power_in",
"description": "PLL ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "15",
"name": "PVDD",
"type": "power_in",
"description": "PLL supply, must be 3.3 V ± 10%, bypassed to Pin 14 (PGND)."
},
{
"number": "16",
"name": "PLLFILT",
"type": "passive",
"description": "PLL filter pin; the internally generated voltage is typically between 1.65 V and 2.10 V."
},
{
"number": "17",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "18",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V − 5% to 3.3 V + 10%, bypassed to Pin 17 (DGND)."
},
{
"number": "19",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "20",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply, must be 1.2 V ± 5%, supplied externally or via the internal regulator and external pass transistor; bypassed to Pin 19 (DGND)."
},
{
"number": "21",
"name": "XTALIN/MCLK",
"type": "input",
"description": "Crystal oscillator input or master clock input to the PLL, driven directly or by a crystal via XTALOUT."
},
{
"number": "22",
"name": "XTALOUT",
"type": "output",
"description": "Crystal oscillator output for driving an external crystal; disconnect when not in use."
},
{
"number": "23",
"name": "CLKOUT",
"type": "output",
"description": "Configurable master clock output at 1x, 2x, 4x or 8x the divided clock input to the PLL; disconnect when not in use."
},
{
"number": "24",
"name": "RESET",
"type": "input",
"description": "Active-low reset input with internal pull-down; reset triggers on a high-to-low edge, exits on low-to-high, and sets all RAMs and registers to defaults."
},
{
"number": "25",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "26",
"name": "SS_M/MP0",
"type": "bidirectional",
"description": "SPI master slave select or multipurpose GPIO 0 with nominal 250 kΩ pull-up; at self boot, floating selects SPI and a 10 kΩ pull-down to DGND selects I2C."
},
{
"number": "27",
"name": "MOSI_M/MP1",
"type": "bidirectional",
"description": "SPI master data output or multipurpose GPIO 1 with disableable pull-up; disconnect when not in use."
},
{
"number": "28",
"name": "SCL_M/SCLK_M/MP2",
"type": "bidirectional",
"description": "I2C master serial clock (open collector, 2.0 kΩ pull-up to IOVDD), SPI master clock, or multipurpose GPIO 2."
},
{
"number": "29",
"name": "SDA_M/MISO_M/MP3",
"type": "bidirectional",
"description": "I2C master serial data (open collector, 2.0 kΩ pull-up to IOVDD), SPI master data input, or multipurpose GPIO 3."
},
{
"number": "30",
"name": "MISO/SDA",
"type": "bidirectional",
"description": "SPI slave data output or I2C slave serial data (open collector, 2.0 kΩ pull-up to IOVDD); connect to IOVDD with 10.0 kΩ when unused."
},
{
"number": "31",
"name": "SCLK/SCL",
"type": "input",
"description": "SPI slave serial clock or I2C slave serial clock input (2.0 kΩ pull-up to IOVDD for I2C); connect to IOVDD with 10.0 kΩ when unused."
},
{
"number": "32",
"name": "MOSI/ADDR1",
"type": "input",
"description": "SPI slave data input or I2C slave address MSB (ADDR1) with disableable pull-up."
},
{
"number": "33",
"name": "SS/ADDR0",
"type": "input",
"description": "SPI slave select or I2C slave address LSB (ADDR0) with nominal 250 kΩ pull-up."
},
{
"number": "34",
"name": "SELFBOOT",
"type": "input",
"description": "Self boot select with pull-up; logic high (IOVDD) starts self boot from EEPROM on the next RESET rising edge, ground disables it."
},
{
"number": "35",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply, must be 1.2 V ± 5%, bypassed to Pin 36 (DGND)."
},
{
"number": "36",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "37",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "38",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V − 5% to 3.3 V + 10%, bypassed to Pin 37 (DGND)."
},
{
"number": "39",
"name": "LRCLK_OUT0/MP4",
"type": "bidirectional",
"description": "Frame clock for Serial Output Port 0 (direction set by master/slave mode) or multipurpose GPIO 4."
},
{
"number": "40",
"name": "BCLK_OUT0",
"type": "bidirectional",
"description": "Bit clock for Serial Output Port 0, direction depending on master or slave mode."
},
{
"number": "41",
"name": "SDATA_OUT0",
"type": "output",
"description": "Serial Output Port 0 data (Channel 0 to 15), supporting 2-, 4-, 8- and 16-channel modes."
},
{
"number": "42",
"name": "LRCLK_OUT1/MP5",
"type": "bidirectional",
"description": "Frame clock for Serial Output Port 1 (direction set by master/slave mode) or multipurpose GPIO 5."
},
{
"number": "43",
"name": "BCLK_OUT1",
"type": "bidirectional",
"description": "Bit clock for Serial Output Port 1, direction depending on master or slave mode."
},
{
"number": "44",
"name": "SDATA_OUT1",
"type": "output",
"description": "Serial Output Port 1 data (Channel 16 to 31), supporting 2-, 4-, 8- and 16-channel modes."
},
{
"number": "45",
"name": "MP6",
"type": "bidirectional",
"description": "Configurable multipurpose general-purpose input/output 6."
},
{
"number": "46",
"name": "MP7",
"type": "bidirectional",
"description": "Configurable multipurpose general-purpose input/output 7."
},
{
"number": "47",
"name": "LRCLK_OUT2/MP8",
"type": "bidirectional",
"description": "Frame clock for Serial Output Port 2 (direction set by master/slave mode) or multipurpose GPIO 8."
},
{
"number": "48",
"name": "BCLK_OUT2",
"type": "bidirectional",
"description": "Bit clock for Serial Output Port 2, direction depending on master or slave mode."
},
{
"number": "49",
"name": "SDATA_OUT2",
"type": "output",
"description": "Serial Output Port 2 data (Channel 32 to 39), supporting 2-, 4-, 8-channel or flexible TDM mode."
},
{
"number": "50",
"name": "LRCLK_OUT3/MP9",
"type": "bidirectional",
"description": "Frame clock for Serial Output Port 3 (direction set by master/slave mode) or multipurpose GPIO 9."
},
{
"number": "51",
"name": "BCLK_OUT3",
"type": "bidirectional",
"description": "Bit clock for Serial Output Port 3, direction depending on master or slave mode."
},
{
"number": "52",
"name": "SDATA_OUT3",
"type": "output",
"description": "Serial Output Port 3 data (Channel 40 to 47), supporting 2-, 4-, 8-channel and flexible TDM modes."
},
{
"number": "53",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply, must be 1.2 V ± 5%, bypassed to Pin 54 (DGND)."
},
{
"number": "54",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "55",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "56",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V − 5% to 3.3 V + 10%, bypassed to Pin 55 (DGND)."
},
{
"number": "57",
"name": "BCLK_IN0",
"type": "bidirectional",
"description": "Bit clock for Serial Input Port 0, direction depending on master or slave mode."
},
{
"number": "58",
"name": "LRCLK_IN0/MP10",
"type": "bidirectional",
"description": "Frame clock for Serial Input Port 0 (direction set by master/slave mode) or multipurpose GPIO 10."
},
{
"number": "59",
"name": "SDATA_IN0",
"type": "input",
"description": "Serial Input Port 0 data (Channel 0 to 15), supporting 2-, 4-, 8- or 16-channel mode."
},
{
"number": "60",
"name": "BCLK_IN1",
"type": "bidirectional",
"description": "Bit clock for Serial Input Port 1, direction depending on master or slave mode."
},
{
"number": "61",
"name": "LRCLK_IN1/MP11",
"type": "bidirectional",
"description": "Frame clock for Serial Input Port 1 (direction set by master/slave mode) or multipurpose GPIO 11."
},
{
"number": "62",
"name": "SDATA_IN1",
"type": "input",
"description": "Serial Input Port 1 data (Channel 16 to 31), supporting 2-, 4-, 8- or 16-channel mode."
},
{
"number": "63",
"name": "THD_M",
"type": "passive",
"description": "Thermal diode negative input, connected to the D− pin of an external temperature sensor IC."
},
{
"number": "64",
"name": "THD_P",
"type": "passive",
"description": "Thermal diode positive input, connected to the D+ pin of an external temperature sensor IC."
},
{
"number": "65",
"name": "BCLK_IN2",
"type": "bidirectional",
"description": "Bit clock for Serial Input Port 2, direction depending on master or slave mode."
},
{
"number": "66",
"name": "LRCLK_IN2/MP12",
"type": "bidirectional",
"description": "Frame clock for Serial Input Port 2 (direction set by master/slave mode) or multipurpose GPIO 12."
},
{
"number": "67",
"name": "SDATA_IN2",
"type": "input",
"description": "Serial Input Port 2 data (Channel 32 to 39), supporting 2-, 4-, 8-channel or flexible TDM mode."
},
{
"number": "68",
"name": "BCLK_IN3",
"type": "bidirectional",
"description": "Bit clock for Serial Input Port 3, direction depending on master or slave mode."
},
{
"number": "69",
"name": "LRCLK_IN3/MP13",
"type": "bidirectional",
"description": "Frame clock for Serial Input Port 3 (direction set by master/slave mode) or multipurpose GPIO 13."
},
{
"number": "70",
"name": "SDATA_IN3",
"type": "input",
"description": "Serial Input Port 3 data (Channel 40 to 47), supporting 2-, 4-, 8-channel or flexible TDM mode."
},
{
"number": "71",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply, must be 1.2 V ± 5%, bypassed to Pin 72 (DGND)."
},
{
"number": "72",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND and PGND pins together in a common ground plane."
},
{
"number": "73",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin types for VDRIVE (output), THD_M/THD_P (passive) and PLLFILT (passive) are inferred from descrip; Exposed pad is labelled EP in the datasheet table; it is grounded, so typed power_in."
],
"pages_sent": 38,
"cost_usd": 0.5046,
"at": "2026-10-30T20:54:20"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1462-1466.pdf",
"pages": 202,
"sha256": "c473f6316a5d3f95",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 73,
"described": 73,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "adau1462wbcpz300.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.02,
10.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d4061a19ffd60d48c12394d682906081b7364e9f956c19651a76fcb2a056e56f",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "adau1462wbcpz300-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.02,
10.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e8d8d5be82e882ccd08e8b8d2b87aa3a2122364617e8a11c54ba1158e214df20",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "CP-72-6",
"source_page": 202,
"D": {
"nom_mm": 10.0,
"range_mm": [
9.9,
10.1
]
},
"E1": {
"nom_mm": 10.0,
"range_mm": [
9.9,
10.1
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.85,
"range_mm": [
0.8,
1.0
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "adau1462wbcpz300.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}