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ADAS3023BCPZ

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Analog Devices ADC/DAC - Specialized, LFCSP-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADAS3023BCPZ

Analog Devices · ADC/DAC - Specialized · LFCSP-40(6x6)

ADAS3023BCPZ from Analog Devices, in a LFCSP-40(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN0 input Analog input channel 0, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
2 IN1 input Analog input channel 1, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
3 IN2 input Analog input channel 2, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
4 IN3 input Analog input channel 3, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
5 AGND power_in Analog ground; connect to the system analog ground plane.
6 IN4 input Analog input channel 4, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
7 IN5 input Analog input channel 5, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
8 IN6 input Analog input channel 6, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
9 IN7 input Analog input channel 7, referenced to COM; the input voltage on any single pin is limited to VSSH + 2.5 V to VDDH − 2.5 V.
10 COM input Common channel input for IN0 to IN7; the maximum voltage on this pin is ±10.24 V for all PGIA gains.
11 CS input Active-low chip select that enables the digital interface for writing and reading data; tie to DGND or CNV for a dedicated serial interface.
12 DIN input Serial data input for writing the 16-bit CFG word, clocked in on SCK rising edges; do not write data during a conversion.
13 RESET input Asynchronous reset; a low-to-high transition aborts any active conversion and resets the CFG register to its default state.
14 AGND power_in Analog ground; connect to the system analog ground plane.
15 PD input Power-down input; a low-to-high transition powers down the device, and PD must be held high until the user is ready to power on the device.
16 SCK input Serial clock input; DIN and SDO data are synchronized with SCK.
17 VIO power_in Digital interface supply, nominally at the host interface voltage of 1.8 V, 2.5 V, 3.3 V, or 5 V; the datasheet specifies VIO from 1.8 V to AVDD.
18 SDO output Serial data output carrying the conversion result in twos complement format, synchronized to SCK falling edges.
19 BUSY/SDO2 output Converter busy output when CS is high and optional secondary serial data output 2 when SDO2 readout is enabled; data is in twos complement format.
20 CNV input Convert input; a conversion is initiated on the rising edge of CNV.
21 DGND power_in Digital ground; connect to the system digital ground plane.
22 DGND power_in Digital ground; connect to the system digital ground plane.
23 AGND power_in Analog ground; connect to the system analog ground plane.
24 AGND power_in Analog ground; connect to the system analog ground plane.
25 DCAP power_out Internal 2.5 V digital regulator output; decouple with a 10 μF and a 0.1 μF local capacitor.
26 ACAP power_out Internal 2.5 V analog regulator output that supplies the ADC core and analog circuits except the reference; decouple with a 10 μF and a 0.1 μF local capacitor.
27 DVDD power_in Digital 5 V supply; decouple to DGND with a 10 μF and a 0.1 μF local capacitor.
28 AVDD power_in Analog 5 V supply; decouple to AGND with a 10 μF and a 0.1 μF local capacitor.
29 AGND power_in Analog ground; connect to the system analog ground plane.
30 AGND power_in Analog ground; connect to the system analog ground plane.
31 RCAP power_out Internal 2.5 V analog regulator output that supplies the internal reference; decouple with a 10 μF and a 0.1 μF local capacitor.
32 REFIN bidirectional Internal 2.5 V band gap reference output, reference buffer input, or reference power-down input; REF1 and REF2 must be tied together externally.
33 REF1 bidirectional Reference input/output; requires an individual external 10 μF ceramic decoupling capacitor placed close to REF1, REF2, and REFN.
34 REF2 bidirectional Reference input/output; requires an individual external 10 μF ceramic decoupling capacitor placed close to REF1, REF2, and REFN.
35 RGND power_in Reference supply ground; connect to the system analog ground plane.
36 REFN power_in Reference input/output ground; connect the REF1 and REF2 capacitors to REFN and then to the system analog ground plane.
37 REFN power_in Reference input/output ground; connect the REF1 and REF2 capacitors to REFN and then to the system analog ground plane.
38 VSSH power_in High voltage analog negative supply, nominally −15 V; decouple with a 10 μF and a 0.1 μF local capacitor and connect the exposed pad to VSSH.
39 VDDH power_in High voltage analog positive supply, nominally 15 V; decouple with a 10 μF and a 0.1 μF local capacitor.
40 AGND power_in Analog ground; connect to the system analog ground plane.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LFCSP-40(6x6)
Category Data Converters
Pins 41

CAD (KiCad official)

  • Symbol: ADAS3023BCPZ
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: LFCSP-40(6x6) (KiCad packages3D, STEP)
  • 3D model files: adas3023bcpz-etched.step / adas3023bcpz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adas3023bcpz.step / adas3023bcpz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (30 pp, sha256 841c621733243320, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF