# ADAS1000BSTZ

**Analog Devices** · Analog To Digital Converters (ADCs) · LQFP-64(10x10)

ADAS1000BSTZ from Analog Devices, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect; do not connect to this pin. |
| 2 | AGND | power_in | Analog ground. |
| 3 | RESPDAC_RA | passive | Optional path for higher performance respiration resolution, respiration DAC drive, positive side. |
| 4 | EXT_RESP_RA | input | Optional external respiration input; signals in excess of the operating voltage range must be protected against. |
| 5 | EXT_RESP_LL | input | Optional external respiration input; signals in excess of the operating voltage range must be protected against. |
| 6 | EXT_RESP_LA | input | Optional external respiration input; signals in excess of the operating voltage range must be protected against. |
| 7 | REFGND | power_in | Reference ground; connect to a clean ground. |
| 8 | REFOUT | output | Reference output; in standalone mode connect REFOUT to REFIN. |
| 9 | REFIN | input | Reference input; external 10 μF with ESR < 0.2 Ω in parallel with 0.1 μF to GND is required and must be placed as close to the pin as possible. |
| 10 | ECG1_LA | input | Analog input, left arm (LA). |
| 11 | ECG2_LL | input | Analog input, left leg (LL). |
| 12 | ECG3_RA | input | Analog input, right arm (RA). |
| 13 | ECG4_V1 | input | Analog input, chest electrode 1 or auxiliary biopotential input (V1). |
| 14 | ECG5_V2 | input | Analog input, chest electrode 2 or auxiliary biopotential input (V2). |
| 15 | AGND | power_in | Analog ground. |
| 16 | NC | unconnected | No connect; do not connect to this pin. |
| 17 | NC | unconnected | No connect; do not connect to this pin. |
| 18 | AVDD | power_in | Analog supply; the ADAS1000 operates over a 3.15 V to 5.5 V range and bypass recommendations are given in the power supply section. |
| 19 | CM_IN | input | Common-mode input. |
| 20 | RLD_OUT | output | Output and feedback junction for the right leg drive amplifier. |
| 21 | RLD_SJ | input | Summing junction for the right leg drive amplifier. |
| 22 | CM_OUT/WCT | output | Common-mode output voltage (average of selected electrodes); not intended to drive current. |
| 23 | AVDD | power_in | Analog supply; the ADAS1000 operates over a 3.15 V to 5.5 V range and bypass recommendations are given in the power supply section. |
| 24 | AGND | power_in | Analog ground. |
| 25 | AGND | power_in | Analog ground. |
| 26 | ADCVDD | power_in | Analog supply for the ADC with an on-chip linear regulator; primarily for decoupling, may be supplied by an external 1.8 V when VREG_EN is tied to ground. |
| 27 | XTAL1 | passive | External crystal connects between XTAL1 and XTAL2; each XTAL pin requires a capacitor in the range of 6 pF to 10 pF to ground. |
| 28 | XTAL2 | passive | External crystal connects between XTAL1 and XTAL2; each XTAL pin requires a capacitor in the range of 6 pF to 10 pF to ground. |
| 29 | CLK_IO | bidirectional | Buffered clock input/output; an output for a primary device and an input for a secondary in gang mode; powers up in high impedance. |
| 30 | DVDD | power_in | Digital supply with an on-chip linear regulator for the digital core; primarily for decoupling, can also be overdriven by an external 1.8 V supply. |
| 31 | DGND | power_in | Digital ground. |
| 32 | NC | unconnected | No connect; do not connect to this pin. |
| 33 | NC | unconnected | No connect; do not connect to this pin. |
| 34 | DGND | power_in | Digital ground. |
| 35 | IOVDD | power_in | Digital supply for digital input/output voltage levels. |
| 36 | GPIO0/MCS | bidirectional | General-purpose I/O or primary 128 kHz SPI chip select. |
| 37 | GPIO1/MSCLK | bidirectional | General-purpose I/O or primary 128 kHz SPI clock. |
| 38 | GPIO2/MSDO | bidirectional | General-purpose I/O or primary 128 kHz SPI serial data output. |
| 39 | GPIO3 | bidirectional | General-purpose I/O. |
| 40 | DGND | power_in | Digital ground. |
| 41 | CS | input | Chip select and frame sync, active low; can frame each word or the entire suite of data in framing mode. |
| 42 | DRDY | output | Data ready output; low when conversion data is ready to be read, high when busy, and must be fully read to return high. |
| 43 | SDI | input | Serial data input. |
| 44 | SCLK | input | Serial clock input; data is clocked into the shift register on a rising edge and out on a falling edge. |
| 45 | SDO | output | Serial data output for register readback and data frames. |
| 46 | IOVDD | power_in | Digital supply for digital input/output voltage levels. |
| 47 | DGND | power_in | Digital ground. |
| 48 | NC | unconnected | No connect; do not connect to this pin. |
| 49 | NC | unconnected | No connect; do not connect to this pin. |
| 50 | DGND | power_in | Digital ground. |
| 51 | DVDD | power_in | Digital supply with an on-chip linear regulator for the digital core; primarily for decoupling, can also be overdriven by an external 1.8 V supply. |
| 52 | SYNC_GANG | bidirectional | Synchronization control; output on primary, input on secondary; powers up in high impedance. |
| 53 | PD | input | Power-down, active low. |
| 54 | RESET | input | Digital input with internal pull-up that resets all internal nodes to their power-on reset values. |
| 55 | ADCVDD | power_in | Analog supply for the ADC with an on-chip linear regulator; primarily for decoupling, may be supplied by an external 1.8 V when VREG_EN is tied to ground. |
| 56 | AGND | power_in | Analog ground. |
| 57 | AGND | power_in | Analog ground; the exposed pad is connected to the most negative potential, AGND. |
| 58 | AVDD | power_in | Analog supply; the ADAS1000 operates over a 3.15 V to 5.5 V range and bypass recommendations are given in the power supply section. |
| 59 | VREG_EN | input | Enables or disables the internal voltage regulators for ADCVDD and DVDD; tie to AVDD to enable or to ground to disable. |
| 60 | SHIELD/RESPDAC_LA | bidirectional | Shared pin: output of the shield driver (SHIELD) or respiration DAC negative side 1 (RESPDAC_LA), selected by user configuration. |
| 61 | CAL_DAC_IO | bidirectional | Calibration DAC input/output; output for a primary device and input for a secondary; not intended to drive current. |
| 62 | RESPDAC_LL | passive | Optional path for higher performance respiration resolution, respiration DAC drive, negative side 0. |
| 63 | AVDD | power_in | Analog supply; the ADAS1000 operates over a 3.15 V to 5.5 V range and bypass recommendations are given in the power supply section. |
| 64 | NC | unconnected | No connect; do not connect to this pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LQFP-64(10x10) |
| Category | Data Converters |
| Pins | 64 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Electrode Input Range |  | 0.3 | 1.3 | 2.3 | V | GAIN 0 (gain setting ×1.4) | 4 |
| Electrode Input Range |  | 0.63 | 1.3 | 1.97 | V | GAIN 1 (gain setting ×2.1) | 4 |
| Electrode Input Range |  | 0.8 | 1.3 | 1.8 | V | GAIN 2 (gain setting ×2.8) | 4 |
| Electrode Input Range |  | 0.97 | 1.3 | 1.63 | V | GAIN 3 (gain setting ×4.2) | 4 |
| Input Bias Current |  | -10 |  | 10 | nA | Relates to each electrode input; over specified electrode input range; dc and ac lead-off are disabled, applies at ambient temperature, TA = 25°C | 4 |
| Input Bias Current |  | -20 |  | 20 | nA | Relates to each electrode input; over specified electrode input range; dc and ac lead-off are disabled, applies across full temperature range, TA = −40°C to +85°C | 4 |
| Input Bias Current |  | -200 |  | 200 | nA | Over full AGND to AVDD input range | 4 |
| Input Offset Tempco |  | -2 |  | 2 | μV/°C |  | 4 |
| Gain Error |  | -1 | 0.01 | 1 | % | GAIN 0 to GAIN 2, factory calibrated; programmable user or factory calibration option enables; factory gain calibration applies only to standard ECG interface | 5 |
| Gain Error |  | -2 | 0.1 | 2 | % | GAIN 3 setting, no factory calibration for this gain | 5 |
| Gain Matching |  | -0.1 | 0.02 | 0.1 | % | GAIN 0 to GAIN 2 | 5 |
| Gain Matching |  | -0.5 | 0.1 | 0.5 | % | GAIN 3 | 5 |
| CMRR |  | 105 | 110 |  | dB | 51 kΩ imbalance, 60 Hz with ±300 mV differential dc offset; per AAMI/IEC standards; with driven leg loop closed | 4 |
| Input Voltage Range (CM_IN pin) |  | 0.3 |  | 2.3 | V |  | 5 |
| Input Bias Current (CM_IN pin) |  | -40 |  | 40 | nA | Over operating range; dc and ac lead-off disabled | 5 |
| Input Bias Current (CM_IN pin) |  | -200 |  | 200 | nA | AGND to AVDD | 5 |
| VCM_REF | VCM_REF | 1.28 | 1.3 | 1.32 | V | Internal voltage; independent of supply | 5 |
| Output Voltage, VCM | VCM | 0.3 | 1.3 | 2.3 | V | No dc load | 5 |
| Input Voltage Range (respiration) |  | 0.3 |  | 2.3 | V | AC-coupled, independent of supply | 5 |
| Input Bias Current (respiration) |  | -10 |  | 10 | nA | Applies to EXT_RESP_xx pins over AGND to AVDD | 5 |
| Output Voltage Range (RLD) |  | 0.2 |  |  | V | Upper limit printed as AVDD − 0.2 V | 6 |
| RLD_OUT Short Circuit Current | RLD_OUT | -5 |  | 5 | mA | External protection resistor required to meet regulatory patient current limits; output shorted to AVDD/AGND | 6 |
| Lead-Off Current Accuracy |  | -10 |  | 10 | % | Of programmed value | 6 |
| REFIN Input Range | REFIN | 1.76 | 1.8 | 1.84 | V | Channel gain scales directly with REFIN | 6 |
| Input Current |  | 450 | 675 | 950 | μA | 5 ECG channels and respiration enabled | 6 |
| Output Voltage, VREF | VREF | 1.785 | 1.8 | 1.815 | V |  | 6 |
| Reference Tempco |  | -10 |  | 10 | ppm/°C |  | 6 |
| Full-Scale Output Voltage (calibration DAC) |  | 2.64 | 2.7 | 2.76 | V | No load, nominal FS output is 1.5 × REFOUT | 6 |
| Zero-Scale Output Voltage (calibration DAC) |  | 0.24 | 0.3 | 0.36 | V | No load | 6 |
| DNL (calibration DAC) |  | -1 |  | 1 | LSB |  | 6 |
| Calibration DAC Test Tone Output Voltage |  | 0.9 | 1 | 1.1 | mV p-p | Rides on common-mode voltage, VCM_REF = 1.3 V | 6 |
| SCLK Cycle Time | SCLK | 25 |  |  | ns | IOVDD = 3.3 V | 10 |
| SCLK Cycle Time | SCLK | 40 |  |  | ns | IOVDD = 2.5 V | 10 |
| SCLK Cycle Time | SCLK | 50 |  |  | ns | IOVDD = 1.8 V | 10 |
| SCLK High Time | tCH | 8 |  |  | ns | SCLK high time | 10 |
| SCLK Low Time | tCL | 8 |  |  | ns | SCLK low time | 10 |
| SCLK Falling Edge to SDO Valid Delay | tDO |  |  | 11 | ns | IOVDD = 3.3 V; SDO capacitance of 15 pF | 10 |
| SCLK Falling Edge to SDO Valid Delay | tDO |  |  | 19 | ns | IOVDD = 2.5 V; SDO capacitance of 15 pF | 10 |
| SCLK Falling Edge to SDO Valid Delay | tDO |  |  | 24 | ns | IOVDD = 1.8 V; SDO capacitance of 15 pF | 10 |
| RESET Low Time |  | 20 |  |  | ns | Minimum pulse width; RESET is edge triggered | 10 |
| AVDD to AGND | AVDD | -0.3 |  | 6 | V |  | 13 |
| IOVDD to DGND | IOVDD | -0.3 |  | 6 | V |  | 13 |
| ADCVDD to AGND | ADCVDD | -0.3 |  | 2.5 | V |  | 13 |
| DVDD to DGND | DVDD | -0.3 |  | 2.5 | V |  | 13 |
| REFIN/REFOUT to REFGND | REFIN/REFOUT | -0.3 |  | 2.1 | V |  | 13 |
| ECG and Analog Inputs to AGND |  | -0.3 |  |  | V | Upper limit printed as AVDD + 0.3 V | 13 |
| Digital Inputs to DGND |  | -0.3 |  |  | V | Upper limit printed as IOVDD + 0.3 V | 13 |
| ECG Input Continuous Current |  | -10 |  | 10 | mA |  | 13 |
| Storage Temperature Range |  | -65 |  | 125 | °C |  | 13 |
| Operating Junction Temperature Range |  | -40 |  | 85 | °C |  | 13 |
| Junction Temperature |  |  |  | 150 | °C | Maximum | 13 |
| ESD HBM |  |  |  | 2500 | V | HBM | 13 |
| Thermal Resistance θJA | θJA |  |  | 42.5 | °C/W | 64-Lead LQFP; JEDEC 4-layer (2S2P) board per JESD51-7, natural convection; worst-case, device soldered in circuit board | 13 |
| AVDD Supply Tolerance | AVDD | -5 |  | 5 | % | AVDD = 3.3 V ± 5% | 4 |
| IOVDD Supply Range | IOVDD | 1.65 |  | 3.6 | V |  | 4 |
| ADCVDD and DVDD Supply Tolerance | ADCVDD, DVDD | -5 |  | 5 | % | ADCVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5% | 4 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C | TA = −40°C to +85°C, unless otherwise noted | 4 |

## CAD (KiCad official)

- Symbol: `ADAS1000BSTZ`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `adas1000bstz-etched.step` / `adas1000bstz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adas1000bstz.step` / `adas1000bstz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADAS1000_1000-1_1000-2.pdf) (79 pp, sha256 `df4c0f36d7450806`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/adas1000bstz-datasheet.pdf)