component

ADAR7251WBCSZ

Public Made by Adom

by adom

Analog Devices Analog To Digital Converters (ADCs), LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionadar7251wbcszfactory-2.0.0extractor-text

Verified ADAR7251WBCSZ

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 49 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADAR7251WBCSZ · LFCSP-48(7x7) · 49 pins
  • ✓copper: 49 copper pads, none touching another net
  • ✓datasheet: all 49 pin names found in the 72-page datasheet
  • ✓distributor: lcsc C654357, digikey 505-ADAR7251WBCSZ-ND, mouser 584-ADAR7251WBCSZ
  • ✓family: QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-64b5wiod/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.72)
  • ✓pads: 49 pins = 49 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 49 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adar7251wbcsz.kicad_sym✓ adar7251wbcsz.kicad_mod✓ adar7251wbcsz.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
adar7251wbcsz / README.md
History Download
Ray Publish 0.1.0 bff4d97 3d ago

ADAR7251WBCSZ

Analog Devices · Analog To Digital Converters (ADCs) · LFCSP-48(7x7)

ADAR7251WBCSZ from Analog Devices, in a LFCSP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND1 power_in Analog ground, the reference point for all analog blocks; AGND1 and AGND2 are shorted internally.
2 AIN3P input Noninverting input to differential analog channel 3.
3 AIN3N input Inverting input to differential analog channel 3.
4 AIN4P input Noninverting input to differential analog channel 4.
5 AIN4N input Inverting input to differential analog channel 4.
6 AUXIN1 input Auxiliary ADC single-ended analog input 1.
7 AUXIN2 input Auxiliary ADC single-ended analog input 2.
8 CM bidirectional ADC reference output; connect a 10 µF capacitor in parallel with a 100 nF capacitor from this pin to AGNDx.
9 AGND2 power_in Analog ground, the reference point for all analog blocks; shorted internally to AGND1.
10 BIASN output Internal bias generator; decouple to AGNDx using a 0.47 µF capacitor.
11 BIASP output Internal bias generator; decouple to AVDDx using a 0.47 µF capacitor.
12 AVDD1 power_in Analog supply voltage, 3.3 V; decouple to AGNDx.
13 PLLGND power_in Analog ground for the PLL; connect to a ground plane directly on the board.
14 PLLFILT passive Filter components connection for the PLL (see Figure 60).
15 PLLVDD power_in Analog supply for the analog PLL, 3.3 V; decouple to PLLGND (Pin 13) with a 0.1 µF MLCC and connect to AVDDx or an external 3.3 V source.
16 XIN/MCLKIN input Internal oscillator input or clock input accepting 16 MHz to 54 MHz; connect a crystal between XIN and XOUT, or drive a single-ended clock at MCLKIN.
17 XOUT output Internal oscillator output connection for the external crystal.
18 AVDD2 power_in Analog supply voltage, 3.3 V; decouple to AGNDx.
19 REGOUT_DIGITAL power_out LDO regulator output for the internal digital core (1.8 V typical); decouple to DGNDx and connect to the DVDDx pins when using the internal regulator.
20 DGND1 power_in Digital ground, the reference point for the digital circuitry; DGND1, DGND2 and DGND3 are shorted internally.
21 DVDD1 power_in Digital core power supply input, 1.8 V; connect to REGOUT_DIGITAL (Pin 19) or an external 1.8 V source and decouple to DGNDx.
22 DATA_READY output ADC conversion data ready output; connect to the DSP general-purpose input/output.
23 DGND2 power_in Digital ground, the reference point for the digital circuitry; shorted internally to the other DGNDx pins.
24 DVDD2 power_in Digital core power supply input, 1.8 V; connect to REGOUT_DIGITAL (Pin 19) or an external 1.8 V source and decouple to DGNDx.
25 IOVDD1 power_in Logic power supply input that sets the interface operating voltage; decouple to DGNDx.
26 ADC_DOUT0 output ADC data output in serial mode, or ADC data output Bit 0 and Bit 8 in PPI mode.
27 ADC_DOUT1 output ADC data output in serial mode, or ADC data output Bit 1/9 in PPI mode.
28 ADC_DOUT2/GPIO1 output ADC data output Bit 2 and Bit 10 (PPI mode) or general-purpose input/output 1.
29 ADC_DOUT3/GPIO2 output ADC data output Bit 3 and Bit 11 (PPI mode) or general-purpose input/output 2.
30 ADC_DOUT4 bidirectional ADC data output Bit 4 and Bit 12 in PPI mode.
31 ADC_DOUT5 bidirectional ADC data output Bit 5 and Bit 13 in PPI mode.
32 ADDR15/ADC_DOUT6 bidirectional Sets Bit 1 of the SPI device address (tie to DGNDx or IOVDDx via a 10 kΩ pull-down or pull-up) or serves as ADC data output Bit 6 and Bit 14 in PPI mode.
33 FS_ADC/ADC_DOUT7 bidirectional Active low frame synchronization signal for default ADC data in serial mode, or ADC data output Bit 7 and Bit 15 in PPI mode.
34 SCLK_ADC bidirectional Serial bit clock for the ADC data output in serial and PPI mode; input in slave mode, output in master mode.
35 CONV_START input Active low ADC conversion start input in DAQ/PPI/serial mode; an active low signal initiates a conversion.
36 DGND3 power_in Digital ground, the reference point for the digital circuitry; shorted internally to the other DGNDx pins.
37 IOVDD2 power_in Logic power supply input that sets the interface operating voltage; decouple to DGNDx.
38 SPI_MISO tri_state SPI control interface slave data output, tristated until a read operation is requested.
39 SPI_MOSI input SPI control interface slave data input.
40 SPI_CLK input SPI control interface serial clock input.
41 SPI_SS input SPI control interface slave select, active low; connect an external 10 kΩ pull-up resistor to IOVDDx.
42 FAULT output Digital output active under fault condition; connect an external 10 kΩ pull-up resistor to IOVDDx and usable as an interrupt to the microcontroller or DSP.
43 RESET/PWDN input Active low reset input that places the device in power-down when held low; must be held low until AVDDx is within its specified operating range.
44 AIN1P input Noninverting input to differential analog channel 1.
45 AIN1N input Inverting input to differential analog channel 1.
46 AIN2P input Noninverting input to differential analog channel 2.
47 AIN2N input Inverting input to differential analog channel 2.
48 AVDD3 power_in Analog supply voltage; decouple to AGNDx.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LFCSP-48(7x7)
Category ADC/DAC/Data Conversion
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DVDD On-chip LDO DVDD 1.62 1.8 1.98 V On-chip LDO 7
AVDD supply AVDD 2.97 3.3 3.6 V 7
IOVDD supply IOVDD 2.97 3.3 3.6 V 7
AVDD to AGNDx, DGNDx AVDDx -0.3 3.63 V 11
DVDD to AGNDx, DGNDx DVDDx -0.3 1.98 V 11
IOVDD to AGNDx, DGNDx IOVDDx -0.3 3.63 V 11
AGNDx to DGNDx -0.3 0.3 V 11
Analog Input Voltage to AGNDx -0.3 3.63 V 11
Digital Input Voltage to DGNDx -0.3 3.63 V 11
Digital Output Voltage to DGNDx -0.3 3.63 V 11
Input Current to Any Pin Except Supplies -10 10 mA 11
Operating Temperature Range (Ambient) -40 125 °C 11
Junction Temperature Range -40 150 °C 11
Storage Temperature Range -65 150 °C 11
Soldering Reflow 260 °C RoHS-compliant 11
SPI_SCLK high tCCPH 50 ns SPI port 8
SPI_SCLK low tCCPL 50 ns SPI port 8
SPI_SCLK frequency fSPI_CLK 10 MHz SPI port 8
SPI_MOSI setup to SPI_SCLK rising tCDS 10 ns 8
SPI_MOSI hold from SPI_SCLK rising tCDH 10 ns 8
SPI_SS setup to SPI_SCLK rising tCLS 10 ns 8
SPI_SS hold from SPI_SCLK rising tCLH 40 ns 8
SPI_SS high tCLPH 10 ns 8
SPI_MISO hold from SPI_SCLK rising tCDH 30 ns 8
SPI_MISO delay from SPI_SCLK falling tCOD 30 ns 8
SPI_MISO tristate from SPI_SS rising tCOTS 30 ns 8
MCLKIN duty cycle 40 60 % MCLKIN at 256 × fS, 384 × fS, 512 × fS, and 768 × fS 8
MCLKIN frequency fMCLKIN 16 54 MHz PLL in MCLK mode 8
Reset Pulse tRESET 15 ns RESET/PWDN held low 8
PLL Lock Time 1 ms 8
Thermal resistance junction-to-ambient θJA 25 °C/W 48-Lead LFCSP_SS, JEDEC 2S2P 11
Thermal resistance junction-to-case θJC 1 °C/W 48-Lead LFCSP_SS, JEDEC 2S2P 11
DVDD current, normal operation 32 mA DVDDx external at fS = 1.2 MHz 7
AVDD current, normal operation 115 mA 4-channel ADC, DVDDx internal, fS = 1.2 MHz 7
AVDD current, power-down 1.1 mA RESET/PWDN pin held low without master clock 7
Power dissipation, DVDDx internal 400 mW 4-channel ADC at fS = 1.2 MHz, input master clock = 19.2 MHz 7
Power dissipation, DVDDx external 294 mW 4-channel ADC at fS = 1.2 MHz, input master clock = 19.2 MHz 7
IOVDD current, serial mode 4 mA 4-channel ADC; serial mode, 2 channels per data line, fS = 1.2 MHz 7

CAD (KiCad official)

  • Symbol: ADAR7251WBCSZ
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: LFCSP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: adar7251wbcsz-etched.step / adar7251wbcsz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adar7251wbcsz.step / adar7251wbcsz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (72 pp, sha256 0446061b3236843e, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF