ADA4807-1AKSZ-R7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VOUT	output	Amplifier output, which the datasheet describes as rail-to-rail.
2	-VS	power_in	Negative supply; the part is fully specified at +3 V, +5 V, and ±5 V supplies with an 11 V absolute maximum supply voltage.
3	+IN	input	Noninverting input; the input common-mode voltage range is −VS − 0.2 V to +VS + 0.2 V.
4	-IN	input	Inverting input of the amplifier.
5	DISABLE	input	Active-low power-down pin for the amplifier.
6	+VS	power_in	Positive supply; the absolute maximum supply voltage is 11 V.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SC-70-6
Category	Amplifiers
Pins	6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Offset Voltage (−VS ≤ VICM ≤ +VS − 1.5 V)		-125	20	125	μV	TA = 25°C, VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.5 V	3
Input Offset Voltage (+VS − 1.5 V ≤ VICM ≤ +VS)		-750	140	750	μV	TA = 25°C, VS = ±5 V, +VS − 1.5 V ≤ VICM ≤ +VS	3
Input Offset Voltage Drift			0.7	3.7	μV/°C	VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	3
Input Bias Current (−VS ≤ VICM ≤ +VS − 1.5 V)			-1.2	-1.6	μA	VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.5 V	3
Input Bias Current (+VS − 1.5 V ≤ VICM ≤ +VS)			530	1000	nA	VS = ±5 V, +VS − 1.5 V ≤ VICM ≤ +VS	3
Input Bias Current Drift			2.5	3.6	nA/°C	VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	3
Input Offset Current (−VS ≤ VICM ≤ +VS − 1.5 V)			8	100	nA	VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.5 V	3
Input Offset Current (+VS − 1.5 V ≤ VICM ≤ +VS)			25	150	nA	VS = ±5 V, +VS − 1.5 V ≤ VICM ≤ +VS	3
Input Offset Current Drift			30	250	pA/°C	VS = ±5 V, −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	3
Open-Loop Gain		120	130		dB		3
Common-Mode Rejection Ratio (CMRR)		96	110		dB	VS = ±5 V, VICM = −3 V to +2 V	3
DISABLE Input Voltage Low (Disabled)				1.3	V	VS = ±5 V, Disabled	4
DISABLE Input Voltage High (Enabled)		1.7			V	VS = ±5 V, Enabled	4
DISABLE On Time			1.3	1.8	μs	DISABLE input midswing point to >90% of final VOUT, VPD = +VS	4
DISABLE Off Time			270	340	ns	DISABLE input midswing point to <10% of enabled quiescent current, VPD = −VS	4
Operating Range		2.7		11	V		4
Quiescent Current per Amplifier (Enabled)			1	1.1	mA	Enabled, no load, TA = 25°C, VS = ±5 V	4
Quiescent Current per Amplifier (Disabled)			2.4	4	μA	Disabled, TA = 25°C, VS = ±5 V	4
Power Supply Rejection Ratio (PSRR) Positive		98	107		dB	Positive +VS = 3 V to 5 V, −VS = −5 V	4
Power Supply Rejection Ratio (PSRR) Negative		98	120		dB	Negative +VS = 5 V, −VS = −3 V to −5 V	4
Input Offset Voltage (0 V ≤ VICM ≤ +VS − 1.5 V)		-125	20	125	μV	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.5 V	5
Input Offset Voltage (+VS − 1.5 V ≤ VICM ≤ +VS)		-720	110	720	μV	VS = 5 V, +VS − 1.5 V ≤ VICM ≤ +VS	5
Input Offset Voltage Drift			0.7	3.7	μV/°C	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	5
Input Bias Current (0 V ≤ VICM ≤ +VS − 1.5 V)			-1.2	-2	μA	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.5 V	5
Input Bias Current (+VS − 1.5 V ≤ VICM ≤ +VS)			500	1000	nA	VS = 5 V, +VS − 1.5 V ≤ VICM ≤ +VS	5
Input Bias Current Drift			2.6	3.8	nA/°C	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	5
Input Offset Current (0 V ≤ VICM ≤ +VS − 1.5 V)			8	100	nA	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.5 V	5
Input Offset Current (+VS − 1.5 V ≤ VICM ≤ +VS)			25	150	nA	VS = 5 V, +VS − 1.5 V ≤ VICM ≤ +VS	5
Input Offset Current Drift			30	250	pA/°C	VS = 5 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	5
Open-Loop Gain		113	130		dB	VS = 5 V	5
Common-Mode Rejection Ratio (CMRR)		96	110		dB	VS = 5 V, VICM = 1 V to 3 V	5
DISABLE Input Voltage Low (Disabled)				1.3	V	VS = 5 V, Disabled	6
DISABLE Input Voltage High (Enabled)		1.8			V	VS = 5 V, Enabled	6
DISABLE On Time			450	700	ns	VS = 5 V, DISABLE input midswing point to >90% of final VOUT, VPD = +VS	6
DISABLE Off Time			270	450	ns	VS = 5 V, DISABLE input midswing point to <10% of enabled quiescent current, VPD = −VS	6
Quiescent Current per Amplifier (Enabled)			950	1000	μA	Enabled, no load, TA = 25°C, VS = 5 V	6
Quiescent Current per Amplifier (Disabled)			1.3	2	μA	Disabled, TA = 25°C, VS = 5 V	6
Power Supply Rejection Ratio (PSRR) Positive		98	115		dB	VS = 5 V, Positive +VS = 1.5 V to 3.5 V, −VS = −2.5 V	6
Power Supply Rejection Ratio (PSRR) Negative		98	130		dB	VS = 5 V, Negative +VS = 2.5 V, −VS = −1.5 V to −3.5 V	6
Input Offset Voltage (0 V ≤ VICM ≤ +VS − 1.5 V)		-125	20	125	μV	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.5 V	7
Input Offset Voltage (+VS − 1.5 V ≤ VICM ≤ +VS)		-720	125	720	μV	VS = 3 V, +VS − 1.5 V ≤ VICM ≤ +VS	7
Input Offset Voltage Drift			0.7	3.8	μV/°C	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	7
Input Bias Current (0 V ≤ VICM ≤ +VS − 1.5 V)			-1.2	-2	μA	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.5 V	7
Input Bias Current (+VS − 1.5 V ≤ VICM ≤ +VS)			500	1000	nA	VS = 3 V, +VS − 1.5 V ≤ VICM ≤ +VS	7
Input Bias Current Drift			2.7	3.8	nA/°C	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	7
Input Offset Current (0 V ≤ VICM ≤ +VS − 1.5 V)			8	130	nA	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.5 V	7
Input Offset Current (+VS − 1.5 V ≤ VICM ≤ +VS)			25	150	nA	VS = 3 V, +VS − 1.5 V ≤ VICM ≤ +VS	7
Input Offset Current Drift			40	230	pA/°C	VS = 3 V, 0 V ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX	7
Open-Loop Gain		104	113		dB	VS = 3 V	7
Common-Mode Rejection Ratio (CMRR)		92	110		dB	VS = 3 V, VICM = 0.3 V to 1.3 V	7
DISABLE Input Voltage Low (Disabled)				1.1	V	VS = 3 V, Disabled	8
DISABLE Input Voltage High (Enabled)		1.5			V	VS = 3 V, Enabled	8
DISABLE On Time			500	700	ns	VS = 3 V, DISABLE input midswing point to >90% of final VOUT, VPD = +VS	8
DISABLE Off Time			270	460	ns	VS = 3 V, DISABLE input midswing point to <10% of enabled quiescent current, VPD = −VS	8
Quiescent Current per Amplifier (Enabled)			915	1000	μA	Enabled, no load, TA = 25°C, VS = 3 V	8
Quiescent Current per Amplifier (Disabled)			1	2	μA	Disabled, TA = 25°C, VS = 3 V	8
Power Supply Rejection Ratio (PSRR) Positive		97	113		dB	VS = 3 V, Positive +VS = 1.5 V to 3.5 V, −VS = −1.5 V	8
Power Supply Rejection Ratio (PSRR) Negative		97	130		dB	VS = 3 V, Negative +VS = 1.5 V, −VS = −1.5 V to −3.5 V	8
Supply Voltage				11	V		9
Thermal Resistance θJA, 6-Lead SC70, 4-Layer Board	θJA		209		°C/W	6-Lead SC70, 4-Layer Board; θJA specified for worst case, device soldered in circuit board	9

CAD (KiCad official)

Symbol: ADA4807-1AKSZ-R7
Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
3D model: SC-70-6 (KiCad packages3D, STEP)
3D model files: ada4807-1aksz-r7-etched.step / ada4807-1aksz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4807-1aksz-r7.step / ada4807-1aksz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (33 pp, sha256 8f615c78af71a04a, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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ADA4807-1AKSZ-R7

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