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ADA4637-1BRZ

Analog Devices · FET InputAmplifiers · SOIC-8

ADA4637-1BRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null pin used with a 100 kΩ potentiometer to the supply for input offset adjustment (more than ±11 mV range); not recommended for use.
2 -IN input Inverting input; input voltage range (V−) − 0.3 V to (V+) + 0.3 V, input current limited to ±10 mA.
3 +IN input Non-inverting input; input voltage range (V−) − 0.3 V to (V+) + 0.3 V, input current limited to ±10 mA.
4 V- power_in Negative supply; operates from ±5 V to ±15 V dual supply, 36 V maximum total supply.
5 NULL passive Offset null pin used with a 100 kΩ potentiometer to the supply for input offset adjustment (more than ±11 mV range); not recommended for use.
6 OUT output Amplifier output; short-circuit to GND duration is indefinite, with ±45 mA output current at VO = ±10 V.
7 V+ power_in Positive supply; operates from ±5 V to ±15 V dual supply, 36 V maximum total supply.
8 NC unconnected No connect.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage VOS 70 200 µV VSY = ±15 V, TA = 25°C 3
Offset Voltage VOS 350 µV −40°C ≤ TA ≤ +85°C 3
Offset Voltage VOS 400 µV −40°C ≤ TA ≤ +125°C 3
Offset Voltage Drift, Average ∆VOS/∆T 1 2 µV/°C −40°C ≤ TA ≤ +125°C 3
Power Supply Rejection Ratio PSRR 106 112 dB VSY = ±4.5 V to ±18 V 3
Power Supply Rejection Ratio PSRR 101 dB −40°C ≤ TA ≤ +125°C 3
Input Bias Current IB 1 5 pA TA = 25°C 3
Input Bias Current IB 0.5 nA −40°C ≤ TA ≤ +85°C 3
Input Bias Current IB 2 nA −40°C ≤ TA ≤ +125°C 3
Input Offset Current IOS 0.5 5 pA TA = 25°C 3
Input Offset Current IOS 0.5 nA −40°C ≤ TA ≤ +85°C 3
Input Offset Current IOS 2 nA −40°C ≤ TA ≤ +125°C 3
Voltage Noise Density en 16.5 40 nV/√Hz f = 10 Hz 3
Voltage Noise Density en 7.9 20 nV/√Hz f = 100 Hz 3
Voltage Noise Density en 6.1 8 nV/√Hz f = 1 kHz 3
Voltage Noise Density en 4.8 6 nV/√Hz f = 10 kHz 3
Voltage Noise en p-p 0.7 1.6 µV p-p 0.1 Hz to 10 Hz 3
Current Noise Density in 1.6 2.5 fA/√Hz f = 100 Hz 3
Current Noise in p-p 30 48 fA p-p 0.1 Hz to 10 Hz 3
Input Voltage Range IVR -11 11 V 3
Input Voltage Range IVR -10.5 10.5 V −40°C ≤ TA ≤ +125°C 3
Common-Mode Rejection Ratio CMRR 106 116 dB TA = 25°C, VCM = −11 V to +11 V 3
Common-Mode Rejection Ratio CMRR 98 dB −40°C ≤ TA ≤ +125°C, VCM = −10.5 V to +10.5 V 3
Large Signal Voltage Gain AVO 112 120 dB RL = 1 kΩ, VO = −10 V to +10 V 3
Large Signal Voltage Gain AVO 110 dB −40 ≤ TA ≤ +85°C 3
Large Signal Voltage Gain AVO 102 dB −40 ≤ TA ≤ +125°C 3
Supply Current per Amplifier ISY 7 7.5 mA IO = 0 mA (printed ±) 4
Supply Current per Amplifier ISY 7.8 mA −40°C ≤ TA ≤ +125°C (printed ±) 4
Output Voltage High VOH 12 12.3 V RL = 1 kΩ to VCM 4
Output Voltage High VOH 11.8 V −40°C ≤ TA ≤ +85°C 4
Output Voltage High VOH 11.7 V −40°C ≤ TA ≤ +125°C 4
Output Voltage Low VOL -12.7 -12.3 V RL = 1 kΩ to VCM 4
Output Voltage Low VOL -12.1 V −40°C ≤ TA ≤ +85°C 4
Output Voltage Low VOL -12 V −40°C ≤ TA ≤ +125°C 4
Supply Voltage 36 V 5
Input Current -10 10 mA Input pin has clamp diodes to supply pins 5
Storage Temperature Range -65 150 °C 5
Operating Temperature Range -40 125 °C 5
Junction Temperature Range -65 150 °C 5
Lead Temperature 300 °C Soldering, 60 sec 5
ESD Human Body Model 4 kV 5
Thermal Resistance Junction to Ambient θJA 155 °C/W 8-Lead SOIC_N (R-8) 5
Thermal Resistance Junction to Case θJC 45 °C/W 8-Lead SOIC_N (R-8) 5
Input Resistance RIN 10 TΩ 3
Input Capacitance, Differential Mode CINDM 8 pF 3
Input Capacitance, Common Mode CINCM 7 pF 3
Slew Rate SR 170 V/µs ±10 V out, Cf = 4.8 pF, AV = −4 3
Settling Time to 0.01% tS 300 ns VIN = 10 V step, CL = 35 pF, RL = +1 kΩ, AV = −4 4
Settling Time to 0.1% tS 200 ns VOUT = 10 V step, CL = 35 pF, RL = +1 kΩ, AV = −4 4
Gain Bandwidth Product GBP 79.9 MHz AV = 10 4
Phase Margin ΦM 85 Degrees AV = 10 4
Output Current IOUT 45 mA VO = ±10 V (printed ±) 4
Closed-Loop Output Impedance ZOUT 41 Ω f = 1 MHz, AV = −100 4

CAD (KiCad official)

  • Symbol: ADA4637-1BRZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ada4637-1brz-etched.step / ada4637-1brz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4637-1brz.step / ada4637-1brz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 8800d631e3858998, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF