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ADA4530-1ARZ-R7

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Analog Devices Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADA4530-1ARZ-R7

Analog Devices · Operational Amplifier · SOIC-8

ADA4530-1ARZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +IN input Noninverting input of the amplifier, which is kept within the input voltage limits of (V−) − 0.3 V to (V+) + 0.3 V in the absolute maximum ratings.
2 GRD output Guard pin of the integrated guard buffer, placed around the input traces to isolate the inputs from PCB leakage.
3 IC passive Internal connection pin that must be connected to V− or left unconnected.
4 V− power_in Negative supply voltage; the part operates from 4.5 V to 16 V total supply (±2.25 V to ±8 V).
5 V+ power_in Positive supply voltage; the part operates from 4.5 V to 16 V total supply (±2.25 V to ±8 V), with an absolute maximum supply of 17 V.
6 OUT output Amplifier output, a rail-to-rail stage that can typically drive to within 30 mV of the supply rails under a 10 kΩ load.
7 GRD output Guard pin of the integrated guard buffer, placed around the input traces to isolate the inputs from PCB leakage.
8 −IN input Inverting input of the amplifier, which is kept within the input voltage limits of (V−) − 0.3 V to (V+) + 0.3 V in the absolute maximum ratings.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Bias Current IB -20 20 fA RH < 50% 5
Input Bias Current IB -250 250 fA −40°C < TA < +125°C, RH < 50% 5
Input Offset Current IOS -20 20 fA RH < 50% 5
Input Offset Current IOS -150 150 fA −40°C < TA < +125°C, RH < 50% 5
Input Offset Voltage VOS -40 8 40 µV 5
Input Offset Voltage VOS -50 9 50 µV VCM = 1.5 V to 3 V 5
Input Offset Voltage VOS -70 70 µV VCM = 1.5 V to 3 V, 0°C < TA < 125°C 5
Input Offset Voltage VOS -150 150 µV VCM = 1.5 V to 3 V, −40°C < TA < 0°C 5
Input Offset Voltage VOS -300 300 µV VCM = 0 V to 3 V 5
Offset Voltage Drift ΔVOS/ΔT -0.5 0.13 0.5 µV/°C 0°C < TA < 125°C 5
Offset Voltage Drift ΔVOS/ΔT -2.8 -0.7 2.8 µV/°C −40°C < TA < 0°C 5
Input Voltage Range IVR 0 3 V 5
Common-Mode Rejection Ratio CMRR 92 114 dB VCM = 1.5 V to 3 V 5
Common-Mode Rejection Ratio CMRR 90 dB −40°C < TA < +125°C 5
Common-Mode Rejection Ratio CMRR 73 dB VCM = 0 V to 3 V 5
Large Signal Voltage Gain AVO 120 143 dB RL = 2 kΩ to VCM, VOUT = 0.2 V to 4.3 V 5
Large Signal Voltage Gain AVO 120 dB −40°C < TA < +125°C 5
Input Resistance RIN 100 TΩ −40°C < TA < +125°C 5
Output Voltage High VOH 4.47 4.49 V RL = 10 kΩ to VCM 5
Output Voltage High VOH 4.46 V −40°C < TA < +125°C 5
Output Voltage High VOH 4.4 4.45 V RL = 2 kΩ to VCM 5
Output Voltage High VOH 4.38 V −40°C < TA < +125°C 5
Output Voltage Low VOL 10 30 mV RL = 10 kΩ to VCM 5
Output Voltage Low VOL 40 mV −40°C < TA < +125°C 5
Output Voltage Low VOL 30 100 mV RL = 2 kΩ to VCM 5
Output Voltage Low VOL 120 mV −40°C < TA < +125°C 5
Power Supply Rejection Ratio PSRR 130 150 dB VSY = 4.5 V to 16 V 5
Power Supply Rejection Ratio PSRR 130 dB −40°C < TA < +125°C 5
Supply Current ISY 0.9 1.3 mA IOUT = 0 mA 5
Supply Current ISY 1.5 mA −40°C < TA < +125°C 5
Guard Offset Voltage VGOS 15 100 µV VCM = 1.5 V to 3 V 6
Guard Offset Voltage VGOS 120 µV VCM = 1.5 V to 3 V, 0°C < TA < 125°C 6
Guard Offset Voltage VGOS 250 µV VCM = 1.5 V to 3 V, −40°C < TA < 0°C 6
Guard Offset Voltage VGOS 150 µV VCM = 0.1 V to 3 V 6
Guard Offset Voltage Drift ΔVGOS/ΔT 0.18 1 µV/°C 0°C < TA < +125°C 6
Guard Offset Voltage Drift ΔVGOS/ΔT 1.4 7 µV/°C −40°C < TA < 0°C 6
Output Voltage Range 0.1 3 V VGOS < 150 µV 6
Supply Voltage 4.5 16 V 1
Supply Voltage 17 V 11
Input Current 10 mA 11
Differential Input Voltage -0.7 0.7 V 11
Storage Temperature Range -65 150 °C 11
Operating Temperature Range -40 125 °C 11
Junction Temperature Range -65 150 °C 11
Lead Temperature (Soldering) 300 °C 60 sec 11
Electrostatic Discharge, Human Body Model 4 kV ESDA/JEDEC JS-001-2012 11
Field Induced Charged Device Model (FICDM) 1.25 kV JESD22-C101-E 11
Thermal Resistance, Junction-to-Ambient (8-Lead SOIC) θJA 122 °C/W 4-layer JEDEC board, worst case 11
Thermal Resistance, Junction-to-Case (8-Lead SOIC) θJC 41 °C/W 11

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs because they have adequate insulation resistance and dielectric absorption performance. 49

CAD (KiCad official)

  • Symbol: ADA4530-1ARZ-R7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ada4530-1arz-r7-etched.step / ada4530-1arz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4530-1arz-r7.step / ada4530-1arz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (53 pp, sha256 abb1a1415c7e3baa, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF