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ADA4522-2ARZ-RL

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Analog Devices Precision Op Amps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ADA4522-2ARZ-RL

Analog Devices · Precision Op Amps · SOIC-8

ADA4522-2ARZ-RL from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A; the datasheet specifies the output swing as rail-to-rail, with VOH of 4.97 V typical and VOL of 20 mV typical at 5.0 V, VSY = 5.0 V, RL = 10 kΩ to VSY/2.
2 -IN A input Inverting input of channel A; input voltage must stay within the absolute maximum range of (V−) − 300 mV to (V+) + 300 mV.
3 +IN A input Noninverting input of channel A; input voltage must stay within the absolute maximum range of (V−) − 300 mV to (V+) + 300 mV.
4 V- power_in Negative supply voltage; the supplies should be applied simultaneously, or the positive supply first if simultaneous application is not possible.
5 +IN B input Noninverting input of channel B; input voltage must stay within the absolute maximum range of (V−) − 300 mV to (V+) + 300 mV.
6 -IN B input Inverting input of channel B; input voltage must stay within the absolute maximum range of (V−) − 300 mV to (V+) + 300 mV.
7 OUT B output Output of channel B; the datasheet specifies the output swing as rail-to-rail, with VOH of 4.97 V typical and VOL of 20 mV typical at 5.0 V, VSY = 5.0 V, RL = 10 kΩ to VSY/2.
8 V+ power_in Positive supply voltage; the device operates from 4.5 V to 55 V single supply or ±2.25 V to ±27.5 V dual supply.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage VOS 0.7 5 µV VSY = 5.0 V; VCM = VSY/2 3
Offset Voltage VOS 6.5 µV VSY = 5.0 V; −40°C ≤ TA ≤ +125°C 3
Offset Voltage Drift TCVOS 2.5 15 nV/°C VSY = 5.0 V 3
Input Bias Current IB 50 150 pA VSY = 5.0 V 3
Input Bias Current IB 2 nA VSY = 5.0 V; −40°C ≤ TA ≤ +125°C 3
Input Offset Current IOS 80 250 pA VSY = 5.0 V 3
Input Offset Current IOS 500 pA VSY = 5.0 V; −40°C ≤ TA ≤ +125°C 3
Input Voltage Range IVR 0 3.5 V VSY = 5.0 V 3
Common-Mode Rejection Ratio CMRR 135 155 dB VSY = 5.0 V; ADA4522-1, ADA4522-2; VCM = 0 V to 3.5 V 3
Large Signal Voltage Gain AV 125 145 dB VSY = 5.0 V; RL = 10 kΩ, VOUT = 0.5 V to 4.5 V 3
Output Voltage High VOH 4.97 4.98 V VSY = 5.0 V; RL = 10 kΩ to VSY/2 3
Output Voltage High VOH 4.95 V VSY = 5.0 V; −40°C ≤ TA ≤ +125°C 3
Output Voltage Low VOL 20 30 mV VSY = 5.0 V; RL = 10 kΩ to VSY/2 3
Output Voltage Low VOL 50 mV VSY = 5.0 V; −40°C ≤ TA ≤ +125°C 3
Power Supply Rejection Ratio PSRR 150 160 dB VSY = 4.5 V to 55 V 3
Supply Current per Amplifier ISY 830 900 µA VSY = 5.0 V; ADA4522-2, IOUT = 0 mA 3
Supply Current per Amplifier ISY 950 µA VSY = 5.0 V; ADA4522-2, −40°C ≤ TA ≤ +125°C 3
Offset Voltage VOS 1 5 µV VSY = 30 V; VCM = VSY/2 4
Offset Voltage VOS 7.2 µV VSY = 30 V; −40°C ≤ TA ≤ +125°C 4
Offset Voltage Drift TCVOS 4 22 nV/°C VSY = 30 V; ADA4522-1, ADA4522-2 4
Input Bias Current IB 50 150 pA VSY = 30 V 4
Input Bias Current IB 3 nA VSY = 30 V; −40°C ≤ TA ≤ +125°C 4
Input Offset Current IOS 80 300 pA VSY = 30 V 4
Input Offset Current IOS 500 pA VSY = 30 V; −40°C ≤ TA ≤ +125°C 4
Input Voltage Range IVR 0 28.5 V VSY = 30 V 4
Common-Mode Rejection Ratio CMRR 145 160 dB VSY = 30 V; VCM = 0 V to 28.5 V 4
Large Signal Voltage Gain AV 140 150 dB VSY = 30 V; RL = 10 kΩ, VOUT = 0.5 V to 29.5 V 4
Output Voltage High VOH 29.87 29.89 V VSY = 30 V; RL = 10 kΩ to VSY/2 4
Output Voltage High VOH 29.8 V VSY = 30 V; −40°C ≤ TA ≤ +125°C 5
Output Voltage Low VOL 110 130 mV VSY = 30 V; RL = 10 kΩ to VSY/2 5
Output Voltage Low VOL 200 mV VSY = 30 V; −40°C ≤ TA ≤ +125°C 5
Power Supply Rejection Ratio PSRR 150 160 dB VSY = 4.5 V to 55 V 5
Supply Current per Amplifier ISY 830 900 µA VSY = 30 V; ADA4522-2, IOUT = 0 mA 5
Supply Current per Amplifier ISY 950 µA VSY = 30 V; ADA4522-2, −40°C ≤ TA ≤ +125°C 5
Offset Voltage VOS 1.5 7 µV VSY = 55 V; VCM = VSY/2 5
Offset Voltage VOS 10 µV VSY = 55 V; −40°C ≤ TA ≤ +125°C 5
Offset Voltage Drift TCVOS 6 30 nV/°C VSY = 55 V; ADA4522-1, ADA4522-2 5
Input Bias Current IB 50 150 pA VSY = 55 V 6
Input Bias Current IB 4.5 nA VSY = 55 V; −40°C ≤ TA ≤ +125°C 6
Input Offset Current IOS 80 300 pA VSY = 55 V 6
Input Offset Current IOS 500 pA VSY = 55 V; ADA4522-1, ADA4522-2; −40°C ≤ TA ≤ +125°C 6
Input Voltage Range IVR 0 53.5 V VSY = 55 V 6
Common-Mode Rejection Ratio CMRR 140 144 dB VSY = 55 V; VCM = 0 V to 53.5 V 6
Large Signal Voltage Gain AV 135 137 dB VSY = 55 V; RL = 10 kΩ, VOUT = 0.5 V to 54.5 V 6
Output Voltage High VOH 54.75 54.8 V VSY = 55 V; RL = 10 kΩ to VSY/2 6
Output Voltage High VOH 54.65 V VSY = 55 V; −40°C ≤ TA ≤ +125°C 6
Output Voltage Low VOL 200 250 mV VSY = 55 V; RL = 10 kΩ to VSY/2 6
Output Voltage Low VOL 350 mV VSY = 55 V; −40°C ≤ TA ≤ +125°C 6
Power Supply Rejection Ratio PSRR 150 160 dB VSY = 4.5 V to 55 V 6
Supply Current per Amplifier ISY 830 900 µA VSY = 55 V; ADA4522-2, IOUT = 0 mA 6
Supply Current per Amplifier ISY 950 µA VSY = 55 V; ADA4522-2, −40°C ≤ TA ≤ +125°C 6
Supply Voltage 60 V 8
Differential Input Voltage -5 5 V 8
Input Current -10 10 mA Footnote 1: whenever input signals exceed the power supply rail by 300 mV 8
Operating Temperature Range -40 125 °C 8
Storage Temperature Range -65 150 °C 8
Junction Temperature Range -65 150 °C 8
Lead Temperature (Soldering) 300 °C Soldering, 60 sec 8
Thermal Resistance Junction-to-Ambient θJA 122 °C/W R-8 (SOIC) package; standard 4-layer JEDEC board 8
Thermal Resistance Junction-to-Case θJC 41 °C/W R-8 (SOIC) package 8

CAD (KiCad official)

  • Symbol: ADA4522-2ARZ-RL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ada4522-2arz-rl-etched.step / ada4522-2arz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4522-2arz-rl.step / ada4522-2arz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (33 pp, sha256 cbbd717347141cb3, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF