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Ray Publish 0.1.0 922b825 23h ago

ADA4099-1BUJZ-R5

Analog Devices · Operational Amplifier · TSOT-6

ADA4099-1BUJZ-R5 from Analog Devices, in a TSOT-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Amplifier output.
2 −VS power_in Negative power supply; in single-supply applications normally soldered to a low impedance ground plane, and in split supply applications bypassed with at least 0.1 μF to a low impedance ground plane as close to the pin as possible.
3 +IN input Noninverting input of the amplifier.
4 −IN input Inverting input of the amplifier.
5 SHDN input Op amp shutdown; the shutdown threshold is approximately 1 V above −VS, the amplifier is active if unconnected or tied to −VS, and it is placed in shutdown with a high impedance output when asserted high (VSHDN > −VS + 1.5 V).
6 +VS power_in Positive power supply; bypass with at least 0.1 μF to a low impedance ground plane as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSOT-6
Category Operational Amplifier/Comparator
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -40 10 40 µV 0.25 V < VCM < 3.25 V 3
Input Offset Voltage TMIN to TMAX VOS -90 90 µV TMIN < TA < TMAX 3
Input Offset Voltage VOS -65 25 65 µV 0.25 V < VCM < 70 V 3
Input Offset Voltage TMIN to TMAX VOS -125 125 µV TMIN < TA < TMAX 3
Input Offset Voltage VOS -70 25 70 µV −0.1 V < VCM < +70 V 3
Input Offset Voltage Drift VOS -0.4 0.1 0.4 µV/°C TMIN < TA < TMAX 3
Input Bias Current IB -10 4 10 nA 3
Input Bias Current TMIN to TMAX IB -15 15 nA TMIN < TA < TMAX 3
Input Bias Current Over-The-Top IB 70 82.5 98 µA VCM = 70 V, Over-The-Top 3
Input Bias Current Over-The-Top TMIN to TMAX IB 40 125 µA TMIN < TA < TMAX 3
Input Bias Current IB 0.001 10 µA 0 V < VCM < 70 V, VSY = 0 V 3
Input Offset Current IOS -4 2 4 nA 3
Input Offset Current TMIN to TMAX IOS -20 20 nA TMIN < TA < TMAX 3
Input Offset Current Over-The-Top IOS -2 0.5 2 µA VCM = 70 V, Over-The-Top 3
Common-Mode Rejection Ratio CMRR 118 136 dB VCM = −0.1 V to +70 V 3
Common-Mode Rejection Ratio TMIN to TMAX CMRR 110 dB TMIN < TA < TMAX 3
Common-Mode Rejection Ratio CMRR 114 132 dB VCM = 0.25 V to 3.25 V 3
Large Signal Voltage Gain AOL 126 140 dB ΔVOUT = 4 V 3
Large Signal Voltage Gain TMIN to TMAX AOL 116 dB TMIN < TA < TMAX 3
Large Signal Voltage Gain AOL 120 130 dB ΔVOUT = 4 V, RL = 10 kΩ 3
Large Signal Voltage Gain TMIN to TMAX AOL 110 dB TMIN < TA < TMAX 3
Input Voltage Noise 0.1 Hz to 10 Hz en 150 nV p-p f = 0.1 Hz to 10 Hz 3
1/f Noise Corner 6 Hz 3
Input Voltage Noise en 7 nV/√Hz f = 100 Hz 3
Input Voltage Noise Over-The-Top en 8 nV/√Hz f = 100 Hz, VCM > 5 V 3
Input Current Noise in 0.5 pA/√Hz f = 100 Hz 3
Input Current Noise Over-The-Top in 5 pA/√Hz f = 100 Hz, VCM > 5 V 3
Slew Rate SR 2.7 4 V/µs ΔVOUT = 2 V 3
Slew Rate TMIN to TMAX SR 1.75 V/µs TMIN < TA < TMAX 3
Gain Bandwidth Product GBP 7.5 8 MHz fTEST = 25 kHz 3
Gain Bandwidth Product TMIN to TMAX GBP 6.75 MHz TMIN < TA < TMAX 3
Phase Margin 47 Degrees 3
1% Settling Time 1.15 µs ΔVOUT = ±2 V 3
0.1% Settling Time 1.5 µs ΔVOUT = ±2 V 4
Output Voltage Swing Low VOL 45 60 mV VOD = 30 mV, no load 4
Output Voltage Swing Low TMIN to TMAX VOL 105 120 mV TMIN < TA < TMAX 4
Output Voltage Swing Low sink VOL 260 325 mV VOD = 30 mV, ISINK = 10 mA 4
Output Voltage Swing Low sink TMIN to TMAX VOL 435 450 mV TMIN < TA < TMAX 4
Output Voltage Swing High VOH 45 55 mV VOD = 30 mV, no load 4
Output Voltage Swing High TMIN to TMAX VOH 110 140 mV TMIN < TA < TMAX 4
Output Voltage Swing High source VOH 900 1100 mV VOD = 30 mV, source current (ISOURCE) = 10 mA 4
Output Voltage Swing High source TMIN to TMAX VOH 1500 1650 mV TMIN < TA < TMAX 4
Short-Circuit Current Source ISOURCE 20 30 mA 4
Short-Circuit Current Source TMIN to TMAX ISOURCE 15 mA TMIN < TA < TMAX 4
Short-Circuit Current Sink ISINK 40 50 mA 4
Short-Circuit Current Sink TMIN to TMAX ISINK 20 mA TMIN < TA < TMAX 4
Output Pin Leakage During Shutdown -100 0.01 100 nA VSHDN = −VS + 1.5 V 4
Maximum Operating Voltage 50 V 4
Voltage Range Guaranteed by PSRR 3.15 50 V 4
Supply Current per Channel Amplifier Active ISY 1.5 1.6 mA Amplifier active 4
Supply Current per Channel Amplifier Active TMIN to TMAX ISY 2.2 2.35 mA TMIN < TA < TMAX 4
Supply Current Amplifier Shutdown ISY 12 20 µA Amplifier shutdown VSHDN = −VS + 1.5 V 4
Supply Current Amplifier Shutdown TMIN to TMAX ISY 22.5 µA TMIN < TA < TMAX 4
Power Supply Rejection Ratio PSRR 123 136 dB VSY = 3.15 V to ±25 V 5
Power Supply Rejection Ratio TMIN to TMAX PSRR 119 dB TMIN < TA < TMAX 5
Junction Temperature Thermal Shutdown TJ 175 °C 5
Thermal Shutdown Hysteresis 20 °C 5
Operating Temperature Range TA -40 125 °C Ambient temperature (TA), B Grade 5
Input Offset Voltage ±15 V VOS -40 12 40 µV 5
Input Offset Voltage TMIN to TMAX ±15 V VOS -95 95 µV TMIN < TA < TMAX 5
Input Offset Voltage VSY = ±25 V VOS -40 15 40 µV VSY = ±25 V 5
Input Offset Voltage VSY = ±25 V TMIN to TMAX VOS -105 105 µV TMIN < TA < TMAX 5
Input Offset Voltage Drift ±15 V VOS -0.4 0.1 0.4 µV/°C TMIN < TA < TMAX 5
Input Bias Current ±15 V IB -10 4 10 nA 5
Input Bias Current TMIN to TMAX ±15 V IB -25 25 nA TMIN < TA < TMAX 5
Input Offset Current ±15 V IOS -5 2 5 nA 5
Input Offset Current TMIN to TMAX ±15 V IOS -15 15 nA TMIN < TA < TMAX 5
CMRR ±15 V CMRR 118 130 dB VCM = −14.75 V to +13.25 V 5
CMRR TMIN to TMAX ±15 V CMRR 112 dB TMIN < TA < TMAX 5
CMRR VCM = −15.1 V to +13.25 V CMRR 115 126 dB VCM = −15.1 V to +13.25 V 5
CMRR VCM = −15.1 V to +55 V CMRR 117 126 dB VCM = −15.1 V to +55 V 5
CMRR TMIN to TMAX VCM to +55 V CMRR 110 dB TMIN < TA < TMAX 5
Common-Mode Input Range VCM -15.1 55 V Guaranteed by CMRR tests 5
Large Signal Voltage Gain ±15 V AOL 134 154 dB ΔVOUT = 25 V 6
Large Signal Voltage Gain TMIN to TMAX ±15 V AOL 120 dB TMIN < TA < TMAX 6
Large Signal Voltage Gain RL 10 kΩ ±15 V AOL 120 134 dB ΔVOUT = 25 V, RL = 10 kΩ 6
Large Signal Voltage Gain RL 10 kΩ TMIN to TMAX AOL 114 dB TMIN < TA < TMAX 6
Slew Rate ±15 V SR 3.5 5.5 V/µs ΔVOUT = 25 V 6
Slew Rate TMIN to TMAX ±15 V SR 2 V/µs TMIN < TA < TMAX 6
Gain Bandwidth Product ±15 V GBP 7.5 8 MHz fTEST = 25 kHz 6
Gain Bandwidth Product TMIN to TMAX ±15 V GBP 6.75 MHz TMIN < TA < TMAX 6
Phase Margin ±15 V 57 Degrees 6
Output Short-Circuit Current Source ±15 V ISOURCE 25 34 mA 7
Output Short-Circuit Current Source TMIN to TMAX ±15 V ISOURCE 20 mA TMIN < TA < TMAX 7
Output Short-Circuit Current Sink ±15 V ISINK 40 50 mA 7
Output Short-Circuit Current Sink TMIN to TMAX ±15 V ISINK 20 mA TMIN < TA < TMAX 7
Supply Current per Channel ±15 V Amplifier Active ISY 1.65 1.8 mA Amplifier active 7
Supply Current per Channel ±15 V TMIN to TMAX ISY 2.45 2.6 mA TMIN < TA < TMAX 7
Supply Current per Channel VSY = ±25 V ISY 1.75 2 mA VSY = ±25 V 7
Supply Current Amplifier Shutdown ±15 V ISY 17 24 µA Amplifier shutdown, VSHDN = −VS + 1.5 V 7
Power Supply Rejection Ratio ±15 V PSRR 123 136 dB VSY = 3.15 V to 50 V 7
Power Supply Rejection Ratio TMIN to TMAX ±15 V PSRR 119 dB TMIN < TA < TMAX 7
Supply Voltage Transient VS 60 V Transient 8
Supply Voltage Continuous VS 50 V Continuous 8
Differential Input Voltage VID -80 80 V 8
±IN Pin Voltage Continuous VIN -5 80 V Continuous 8
±IN Pin Voltage Survival VIN -10 80 V Survival 8
±IN Pin Current IIN 20 mA 8
SHDN and SHDNx Voltage VSHDN -0.3 60 V 8
Storage Temperature Range TSTG -65 150 °C 8
Operating Temperature Range Absolute Maximum TA -55 150 °C 8
Lead Temperature Soldering 300 °C Soldering, 10 sec 8
Junction Temperature Absolute Maximum TJ 175 °C 8
Thermal Resistance junction to ambient UJ-6 θJA 192 °C/W Package UJ-6 (6-lead TSOT) 8

CAD (KiCad official)

  • Symbol: ADA4099-1BUJZ-R5
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-6 (KiCad packages3D, STEP)
  • 3D model files: ada4099-1bujz-r5-etched.step / ada4099-1bujz-r5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4099-1bujz-r5.step / ada4099-1bujz-r5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (34 pp, sha256 fbd2454306194b55, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF