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ADA4077-4ARZ-R7

Public Made by Adom

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Analog Devices Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADA4077-4ARZ-R7

Analog Devices · Operational Amplifier · SOIC-14

ADA4077-4ARZ-R7 from Analog Devices, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of amplifier channel A.
2 -IN A input Negative (inverting) input of amplifier channel A.
3 +IN A input Positive (non-inverting) input of amplifier channel A.
4 V+ power_in Positive supply voltage; the part operates from ±2.5 V to ±15 V, and the absolute maximum supply voltage is 36 V.
5 +IN B input Positive (non-inverting) input of amplifier channel B.
6 -IN B input Negative (inverting) input of amplifier channel B.
7 OUT B output Output of amplifier channel B.
8 OUT C output Output of amplifier channel C.
9 -IN C input Negative (inverting) input of amplifier channel C.
10 +IN C input Positive (non-inverting) input of amplifier channel C.
11 V- power_in Negative supply voltage; the part operates from ±2.5 V to ±15 V with the supply referenced to this pin.
12 +IN D input Positive (non-inverting) input of amplifier channel D.
13 -IN D input Negative (inverting) input of amplifier channel D.
14 OUT D output Output of amplifier channel D.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage, VSY = ±5 V, A Grade SOIC VOS 15 50 µV 3
Offset Voltage, VSY = ±5 V, A Grade SOIC, over temperature VOS 105 µV −40°C < TA < +125°C 3
Offset Voltage Drift, VSY = ±5 V, A Grade SOIC ∆VOS/∆T 0.4 0.75 µV/°C −40°C < TA < +125°C 3
Input Bias Current, VSY = ±5 V IB -1 -0.4 1 nA 3
Input Bias Current, VSY = ±5 V, over temperature IB -1.5 1.5 nA −40°C < TA < +125°C 3
Input Offset Current, VSY = ±5 V IOS -0.5 0.1 0.5 nA 3
Input Offset Current, VSY = ±5 V, over temperature IOS -1 1 nA −40°C < TA < +125°C 3
Input Voltage Range, VSY = ±5 V -3.8 3 V 3
Common-Mode Rejection Ratio, VSY = ±5 V CMRR 122 140 dB VCM = −3.8 V to +3 V 3
Common-Mode Rejection Ratio, VSY = ±5 V, −40°C to +85°C CMRR 120 dB VCM = −3.8 V to +3 V, −40°C < TA < +85°C 3
Common-Mode Rejection Ratio, VSY = ±5 V, 85°C to 125°C CMRR 120 dB VCM = −3.8 V to +2.8 V, 85°C < TA < 125°C 3
Large Signal Voltage Gain, VSY = ±5 V Av 121 130 dB RL = 2 kΩ, VO = −3.0 V to +3.0 V 3
Large Signal Voltage Gain, VSY = ±5 V, over temperature Av 120 dB −40°C < TA < +125°C 3
Power Supply Rejection Ratio, VSY = ±5 V PSRR 123 128 dB VS = ±2.5 V to ±18 V 3
Power Supply Rejection Ratio, VSY = ±5 V, over temperature PSRR 120 dB −40°C < TA < +125°C 3
Supply Current per Amplifier, VSY = ±5 V ISY 400 450 µA VO = 0 V 3
Supply Current per Amplifier, VSY = ±5 V, over temperature ISY 650 µA −40°C < TA < +125°C 3
Output Voltage High, VSY = ±5 V VOH 3.8 V IL = 1 mA 3
Output Voltage High, VSY = ±5 V, over temperature VOH 3.7 V IL = 1 mA, −40°C < TA < +125°C 3
Output Voltage Low, VSY = ±5 V VOL -3.8 V IL = 1 mA 3
Output Voltage Low, VSY = ±5 V, over temperature VOL -3.7 V IL = 1 mA, −40°C < TA < +125°C 3
Output Current, VSY = ±5 V IOUT -10 10 mA VDROPOUT < 1.6 V 3
Offset Voltage, VSY = ±15 V, A Grade SOIC VOS 15 50 µV 5
Offset Voltage, VSY = ±15 V, A Grade SOIC, over temperature VOS 105 µV −40°C < TA < +125°C 5
Offset Voltage Drift, VSY = ±15 V, A Grade SOIC ∆VOS/∆T 0.4 0.75 µV/°C −40°C < TA < +125°C 5
Input Bias Current, VSY = ±15 V IB -1 -0.4 1 nA 5
Input Bias Current, VSY = ±15 V, over temperature IB -1.5 1.5 nA −40°C < TA < +125°C 5
Input Offset Current, VSY = ±15 V IOS -0.5 0.1 0.5 nA 5
Input Offset Current, VSY = ±15 V, over temperature IOS -1 1 nA −40°C < TA < +125°C 5
Input Voltage Range, VSY = ±15 V -13.8 13 V 5
Common-Mode Rejection Ratio, VSY = ±15 V CMRR 132 150 dB VCM = −13.8 V to +13 V 5
Common-Mode Rejection Ratio, VSY = ±15 V, over temperature CMRR 130 dB −40°C < TA < +125°C 5
Large Signal Voltage Gain, VSY = ±15 V (ADA4077-4, SOIC) Av 122 130 dB RL = 2 kΩ, VO = −13.0 V to +13.0 V 5
Large Signal Voltage Gain, VSY = ±15 V (ADA4077-4, SOIC), over temperature Av 120 dB −40°C < TA < +125°C 5
Output Voltage High, VSY = ±15 V VOH 13.8 V IL = 1 mA 5
Output Voltage High, VSY = ±15 V, over temperature VOH 13.7 V IL = 1 mA, −40°C < TA < +125°C 5
Output Voltage Low, VSY = ±15 V VOL -13.8 V IL = 1 mA 5
Output Voltage Low, VSY = ±15 V, over temperature VOL -13.7 V IL = 1 mA, −40°C < TA < +125°C 5
Output Current, VSY = ±15 V IOUT -10 10 mA VDROPOUT < 1.2 V 5
Power Supply Rejection Ratio, VSY = ±15 V PSRR 123 128 dB VS = ±2.5 V to ±18 V 6
Power Supply Rejection Ratio, VSY = ±15 V, over temperature PSRR 120 dB −40°C < TA < +125°C 6
Supply Current per Amplifier, VSY = ±15 V ISY 400 500 µA VO = 0 V 6
Supply Current per Amplifier, VSY = ±15 V, over temperature ISY 650 µA −40°C < TA < +125°C 6
Supply Voltage (absolute maximum) 36 V 7
Input Current (absolute maximum) -10 10 mA Input pins; see note 1 (clamp diodes) 7
Storage Temperature Range -65 150 °C 7
Operating Temperature Range -40 125 °C 7
Junction Temperature Range -65 150 °C 7
Maximum Reflow Temperature (MSL1 Rating) 260 °C IPC/JEDEC J-STD-020 7
Lead Temperature, Soldering 300 °C 10 sec 7
Electrostatic Discharge, Human Body Model (HBM) 6 kV ESDA/JEDEC JS-001-2011 7
Electrostatic Discharge, Field Induced Charge Device Model (FICDM) 1.25 kV JESD22-C101 7
Dual supply operating range (Features) VSY 2.5 15 V 1
Thermal Resistance, junction-to-ambient, 14-Lead SOIC θJA 115 °C/W Device soldered in circuit board (worst case) 7
Thermal Resistance, junction-to-case, 14-Lead SOIC θJC 36 °C/W 7

CAD (KiCad official)

  • Symbol: ADA4077-4ARZ-R7
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: ada4077-4arz-r7-etched.step / ada4077-4arz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4077-4arz-r7.step / ada4077-4arz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (27 pp, sha256 26ccad92e482592b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF