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ADA4077-1ARZ

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Analog Devices Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ADA4077-1ARZ

Analog Devices · Operational Amplifier · SOIC-8

ADA4077-1ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NIC unconnected Not internally connected; the datasheet gives no function for this pin.
2 -IN input Inverting input; the input pins have clamp diodes to the supply pins and each other, so input current must be limited to 10 mA or less when an input exceeds the supply rail by 0.3 V.
3 +IN input Noninverting input; the input pins have clamp diodes to the supply pins and each other, so input current must be limited to 10 mA or less when an input exceeds the supply rail by 0.3 V.
4 V- power_in Negative supply voltage; the part is specified at ±5 V to ±15 V and operates at ±2.5 V to ±15 V dual supply.
5 NIC unconnected Not internally connected; the datasheet gives no function for this pin.
6 OUT output Amplifier output; output current is specified as ±10 mA with VDROPOUT < 1.6 V, and output short-circuit duration to GND is indefinite.
7 V+ power_in Positive supply voltage; the part is specified at ±5 V to ±15 V and operates at ±2.5 V to ±15 V dual supply, with a 36 V absolute maximum supply voltage.
8 NIC unconnected Not internally connected; the datasheet gives no function for this pin.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 15 50 µV VSY = ±5 V, VCM = 0 V, TA = 25°C; A Grade, SOIC 3
Input Offset Voltage VOS 105 µV −40°C < TA < +125°C; VSY = ±5 V; A Grade, SOIC 3
Offset Voltage Drift ΔVOS/ΔT 0.25 0.55 µV/°C −40°C < TA < +125°C; VSY = ±5 V; A Grade, SOIC 3
Input Bias Current IB -1 -0.4 1 nA 3
Input Bias Current IB -1.5 1.5 nA −40°C < TA < +125°C 3
Input Offset Current IOS -0.5 0.1 0.5 nA 3
Input Offset Current IOS -1 1 nA −40°C < TA < +125°C 3
Input Voltage Range -3.8 3 V VSY = ±5 V 3
Common-Mode Rejection Ratio CMRR 122 140 dB VCM = −3.8 V to +3 V; VSY = ±5 V 3
Large Signal Voltage Gain Av 121 130 dB RL = 2 kΩ, VO = −3.0 V to +3.0 V; VSY = ±5 V 3
Power Supply Rejection Ratio PSRR 123 128 dB VS = ±2.5 V to ±18 V 3
Supply Current per Amplifier ISY 400 450 µA VO = 0 V; VSY = ±5 V 3
Input Offset Voltage VOS 15 50 µV VSY = ±15 V, VCM = 0 V, TA = 25°C; A Grade, SOIC 5
Input Offset Voltage VOS 105 µV −40°C < TA < +125°C; VSY = ±15 V; A Grade, SOIC 5
Offset Voltage Drift ΔVOS/ΔT 0.25 0.55 µV/°C −40°C < TA < +125°C; VSY = ±15 V; A Grade, SOIC 5
Input Bias Current IB -1 -0.4 1 nA 5
Input Bias Current IB -1.5 1.5 nA −40°C < TA < +125°C 5
Input Offset Current IOS -0.5 0.1 0.5 nA 5
Input Offset Current IOS -1 1 nA −40°C < TA < +125°C 5
Input Voltage Range -13.8 13 V VSY = ±15 V 5
Common-Mode Rejection Ratio CMRR 132 150 dB VCM = −13.8 V to +13 V; VSY = ±15 V 5
Large Signal Voltage Gain (ADA4077-1/ADA4077-2 SOIC) Av 125 130 dB RL = 2 kΩ, VO = −13.0 V to +13.0 V; VSY = ±15 V 5
Power Supply Rejection Ratio PSRR 123 128 dB VS = ±2.5 V to ±18 V 6
Supply Current per Amplifier ISY 400 500 µA VO = 0 V; VSY = ±15 V 6
Supply Voltage 36 V 7
Input Current -10 10 mA Note 1: limit to 10 mA when input exceeds supply rail by 0.3 V 7
Storage Temperature Range -65 150 °C 7
Operating Temperature Range -40 125 °C 7
Junction Temperature Range -65 150 °C 7
Maximum Reflow Temperature 260 °C MSL1 rating, IPC/JEDEC J-STD-020 7
Lead Temperature, Soldering 300 °C 10 sec 7
Electrostatic Discharge, Human Body Model 6 kV HBM, ESDA/JEDEC JS-001-2011 7
Electrostatic Discharge, Field Induced Charge Device Model 1.25 kV FICDM, JESD22-C101 7
Thermal Resistance, Junction-to-Ambient (8-Lead SOIC) θJA 158 °C/W Worst case, device soldered in circuit board, surface-mount package 7
Thermal Resistance, Junction-to-Case (8-Lead SOIC) θJC 43 °C/W 7

CAD (KiCad official)

  • Symbol: ADA4077-1ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ada4077-1arz-etched.step / ada4077-1arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4077-1arz.step / ada4077-1arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (27 pp, sha256 26ccad92e482592b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF