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AD9767ASTZ

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Analog Devices Digital To Analog Converters (DACs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Verified AD9767ASTZ

by Ray · last 2 Nov 2026 · 1 record · files match
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2 Nov 2026RayPublished by the parts factory: tier mfr, 48 pinsfiles match
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  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD9767ASTZ · LQFP-48(7x7) · 48 pins
  • ✓copper: 48 copper pads, none touching another net
  • ✓datasheet: all 48 pin names found in the 44-page datasheet
  • ✓distributor: lcsc C578873, digikey 505-AD9767ASTZ-ND, mouser 584-AD9767ASTZ
  • ✓family: LQFP-48_7x7mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-23l0s63k/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 48 pins = 48 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 48 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad9767astz.kicad_sym✓ ad9767astz.kicad_mod✓ ad9767astz.step
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Contents

README

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AD9767ASTZ

Analog Devices · Digital To Analog Converters (DACs) · LQFP-48(7x7)

AD9767ASTZ from Analog Devices, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DB13P1 input Port 1 data bit 13, the MSB of the 14-bit port 1 input word.
2 DB12P1 input Port 1 data bit 12 of the 14-bit port 1 input word.
3 DB11P1 input Port 1 data bit 11 of the 14-bit port 1 input word.
4 DB10P1 input Port 1 data bit 10 of the 14-bit port 1 input word.
5 DB9P1 input Port 1 data bit 9 of the 14-bit port 1 input word.
6 DB8P1 input Port 1 data bit 8 of the 14-bit port 1 input word.
7 DB7P1 input Port 1 data bit 7 of the 14-bit port 1 input word.
8 DB6P1 input Port 1 data bit 6 of the 14-bit port 1 input word.
9 DB5P1 input Port 1 data bit 5 of the 14-bit port 1 input word.
10 DB4P1 input Port 1 data bit 4 of the 14-bit port 1 input word.
11 DB3P1 input Port 1 data bit 3 of the 14-bit port 1 input word.
12 DB2P1 input Port 1 data bit 2 of the 14-bit port 1 input word.
13 DB1P1 input Port 1 data bit 1 of the 14-bit port 1 input word.
14 DB0P1 input Port 1 data bit 0, the LSB of the 14-bit port 1 input word.
15 DCOM1 power_in Digital common for the port 1 digital interface, the digital ground reference.
16 DVDD1 power_in Digital supply for port 1, operating from a 3.3 V to 5 V supply.
17 WRT1/IQWRT input Write signal for port 1, used as IQWRT in interleaved mode.
18 CLK1/IQCLK input Clock input for DAC1, used as IQCLK in interleaved mode.
19 CLK2/IQRESET input Clock input for DAC2, used as IQRESET in interleaved mode.
20 WRT2/IQSEL input Write signal for port 2, used as IQSEL in interleaved mode.
21 DCOM2 power_in Digital common for the port 2 digital interface, the digital ground reference.
22 DVDD2 power_in Digital supply for port 2, operating from a 3.3 V to 5 V supply.
23 DB13P2 input Port 2 data bit 13, the MSB of the 14-bit port 2 input word.
24 DB12P2 input Port 2 data bit 12 of the 14-bit port 2 input word.
25 DB11P2 input Port 2 data bit 11 of the 14-bit port 2 input word.
26 DB10P2 input Port 2 data bit 10 of the 14-bit port 2 input word.
27 DB9P2 input Port 2 data bit 9 of the 14-bit port 2 input word.
28 DB8P2 input Port 2 data bit 8 of the 14-bit port 2 input word.
29 DB7P2 input Port 2 data bit 7 of the 14-bit port 2 input word.
30 DB6P2 input Port 2 data bit 6 of the 14-bit port 2 input word.
31 DB5P2 input Port 2 data bit 5 of the 14-bit port 2 input word.
32 DB4P2 input Port 2 data bit 4 of the 14-bit port 2 input word.
33 DB3P2 input Port 2 data bit 3 of the 14-bit port 2 input word.
34 DB2P2 input Port 2 data bit 2 of the 14-bit port 2 input word.
35 DB1P2 input Port 2 data bit 1 of the 14-bit port 2 input word.
36 DB0P2 input Port 2 data bit 0, the LSB of the 14-bit port 2 input word.
37 SLEEP input Power-down control input that puts the device into sleep mode for low-power idle periods.
38 ACOM power_in Analog common, the analog ground reference for the DACs and reference.
39 IOUTA2 output Port 2 differential DAC current output A, nominal full-scale current 20 mA.
40 IOUTB2 output Port 2 differential DAC current output B, complementary to IOUTA2.
41 FSADJ2 passive Full-scale current output adjust for DAC2, set by an external resistor.
42 GAINCTRL input Selects master/slave resistor control mode for setting the full-scale current of both DACs.
43 REFIO bidirectional Reference input/output for the on-chip 1.20 V temperature-compensated band gap reference.
44 FSADJ1 passive Full-scale current output adjust for DAC1, set by an external resistor.
45 IOUTB1 output Port 1 differential DAC current output B, complementary to IOUTA1.
46 IOUTA1 output Port 1 differential DAC current output A, nominal full-scale current 20 mA.
47 AVDD power_in Analog supply voltage, operating from a 3.3 V to 5 V single supply.
48 MODE input Mode select: 1 selects dual-port operation and 0 selects interleaved data.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LQFP-48(7x7)
Category Data Converters
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Error -0.02 0.02 % of FSR 5
Differential Nonlinearity (DNL) DNL -2.5 1 2.5 LSB TA = 25°C 5
Gain Error Without Internal Reference -2 0.25 2 % of FSR Without internal reference 5
Gain Error with Internal Reference -5 1 5 % of FSR With internal reference 5
Gain Match -1.6 0.1 1.6 % of FSR 5
Gain Match -0.14 0.14 dB 5
Full-Scale Output Current IOUTFS 2 20 mA Nominal full-scale current, IOUTFS, is 32 times the IREF current 5
Output Compliance Range -1 1.25 V 5
Reference Voltage 1.14 1.2 1.26 V 5
Reference Input Compliance Range 0.1 1.25 V 5
Supply Voltage AVDD AVDD 3 5 5.5 V 5
Supply Voltage DVDD1, DVDD2 DVDD1, DVDD2 2.7 5 5.5 V 5
Power Supply Rejection Ratio AVDD -0.4 0.4 % of FSR/V ±10% power supply variation 5
Power Supply Rejection Ratio DVDD -0.025 0.025 % of FSR/V ±10% power supply variation 5
Operating Range -40 85 °C 5
Gain Drift Without Internal Reference -50 50 ppm of FSR/°C 5
Gain Drift with Internal Reference -100 100 ppm of FSR/°C 5
Reference Voltage Drift -50 50 ppm/°C 5
Analog Supply Current (IAVDD) IAVDD 71 75 mA 5
Supply Current Sleep Mode (IAVDD) IAVDD 8 12 mA Sleep mode 5
Power Dissipation 380 410 mW (5 V, IOUTFS = 20 mA) 5
Power Dissipation 420 450 mW (5 V, IOUTFS = 20 mA) 5
Offset Drift 0 ppm of FSR/°C 5
Reference Output Current 100 nA 5
Reference Input Resistance 1 MΩ 5
Small-Signal Bandwidth 0.5 MHz 5
Output Resistance 100 kΩ 5
Output Capacitance 5 pF 5
Maximum Output Update Rate fCLK 125 MSPS 6
Output Settling Time tST 35 ns to 0.1% 6
Output Propagation Delay tPD 1 ns 6
Glitch Impulse 5 pV-s 6
Output Rise Time (10% to 90%) 2.5 ns 6
Output Fall Time (90% to 10%) 2.5 ns 6
Output Noise 50 pA/√Hz IOUTFS = 20 mA 6
Output Noise 30 pA/√Hz IOUTFS = 2 mA 6
Logic 1 Voltage VIH 3.5 5 V @ DVDD1 = DVDD2 = 5 V 7
Logic 1 Voltage VIH 2.1 3 V @ DVDD1 = DVDD2 = 3.3 V 7
Logic 0 Voltage VIL 0 1.3 V @ DVDD1 = DVDD2 = 5 V 7
Logic 0 Voltage VIL 0 0.9 V @ DVDD1 = DVDD2 = 3.3 V 7
Logic 1 Current IIH -10 10 μA 7
Logic 0 Current IIL -10 10 μA 7
Input Capacitance 5 pF 7
Input Setup Time tS 2 ns 7
Input Hold Time tH 1.5 ns 7
Latch Pulse Width tLPW, tCPW 3.5 ns 7
AVDD to ACOM AVDD -0.3 6.5 V With respect to ACOM 8
DVDD1, DVDD2 to DCOM1/DCOM2 DVDD1, DVDD2 -0.3 6.5 V With respect to DCOM1/DCOM2 8
ACOM to DCOM1/DCOM2 -0.3 0.3 V With respect to DCOM1/DCOM2 8
AVDD to DVDD1/DVDD2 -6.5 6.5 V 8
Digital Inputs -0.3 V With respect to DCOM1/DCOM2; max = DVDD1/DVDD2 + 0.3 V 8
IOUTA1/IOUTA2, IOUTB1/IOUTB2 -1 V With respect to ACOM; max = AVDD + 0.3 V 8
REFIO, FSADJ1, FSADJ2 -0.3 V With respect to ACOM; max = AVDD + 0.3 V 8
GAINCTRL, SLEEP -0.3 V With respect to ACOM; max = AVDD + 0.3 V 8
Junction Temperature 150 °C 8
Storage Temperature Range -65 150 °C 8
Lead Temperature 300 °C 10 sec 8
Thermal Resistance θJA θJA 91 °C/W 48-Lead LQFP 8

CAD (KiCad official)

  • Symbol: AD9767ASTZ
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: ad9767astz-etched.step / ad9767astz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad9767astz.step / ad9767astz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (44 pp, sha256 f7dd0a49e6e2b57d, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF