component
AD9544BCPZ
Public Made by Adomby adom
Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ad9544bcpz",
"title": "AD9544BCPZ",
"brief": "Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"rtc-clock chip",
"ad9544bcpz",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "AD9544BCPZ",
"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9544.pdf",
"parts": {
"symbol": "ad9544bcpz.kicad_sym",
"footprint": "ad9544bcpz.kicad_mod",
"model_3d": "ad9544bcpz-hero.glb",
"model_3d_plain": "ad9544bcpz-etched.glb",
"model_3d_step": "ad9544bcpz-etched.step",
"model_3d_step_plain": "ad9544bcpz.step",
"lbr": "ad9544bcpz.lbr"
},
"distributor_links": {
"lcsc": "C653560",
"digikey": "505-AD9544BCPZ-ND",
"mouser": "584-AD9544BCPZ"
},
"distributor_check": {
"checked_at": "2026-10-30T18:28:22Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-AD9544BCPZ-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD9544BCPZ",
"status": "found",
"lifecycle": "Restricted Availability"
}
},
"pins": [
{
"number": "1",
"name": "SDO/M5",
"type": "output",
"description": "Serial data output (SDO) for reading data in 4-wire SPI mode; when not in 4-wire SPI mode it is configurable status/control pin M5, and its VOH and VIH track the VDDIOA supply."
},
{
"number": "2",
"name": "SCLK/SCL",
"type": "input",
"description": "Serial clock input in SPI mode (SCLK) or I²C mode (SCL); its VIH and VOH follow the VDDIOA supply voltage."
},
{
"number": "3",
"name": "VDDIOA",
"type": "power_in",
"description": "Serial port power supply, valid at 1.8 V, 2.5 V, or 3.3 V; it can be connected to the VDD bus for 1.8 V operation."
},
{
"number": "4",
"name": "SDIO/SDA",
"type": "bidirectional",
"description": "Serial data input/output in SPI mode (SDIO) or serial data line in I²C mode (SDA); it has no internal pull-up or pull-down and its VIH and VOH follow VDDIOA."
},
{
"number": "5",
"name": "CSB/M6",
"type": "bidirectional",
"description": "Active-low chip select in SPI mode (CSB) with an internal 10 kΩ pull-up; configurable status/control pin M6 when not in SPI mode, with VIH and VOH following VDDIOA."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "7",
"name": "LDO0",
"type": "input",
"description": "APLL0 loop filter voltage regulator bypass; connect a 0.22 µF capacitor from this pin to ground, which is the AC ground reference for the APLL0 loop filter."
},
{
"number": "8",
"name": "LF0",
"type": "bidirectional",
"description": "APLL0 loop filter node; connect a 3.9 nF capacitor from this pin to pin 7 (LDO0)."
},
{
"number": "9",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "10",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "11",
"name": "OUT0AP",
"type": "output",
"description": "PLL0 output 0A (true), configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "12",
"name": "OUT0AN",
"type": "output",
"description": "PLL0 complementary output 0A, configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "13",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "14",
"name": "OUT0BP",
"type": "output",
"description": "PLL0 output 0B (true), configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "15",
"name": "OUT0BN",
"type": "output",
"description": "PLL0 complementary output 0B, configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "16",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "17",
"name": "OUT0CP",
"type": "output",
"description": "PLL0 output 0C (true), configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "18",
"name": "OUT0CN",
"type": "output",
"description": "PLL0 complementary output 0C, configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "19",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "20",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "21",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "22",
"name": "OUT1BP",
"type": "output",
"description": "PLL1 output 1B (true), configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "23",
"name": "OUT1BN",
"type": "output",
"description": "PLL1 complementary output 1B, configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "24",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "25",
"name": "OUT1AP",
"type": "output",
"description": "PLL1 output 1A (true), configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "26",
"name": "OUT1AN",
"type": "output",
"description": "PLL1 complementary output 1A, configurable as HCSL, LVDS, CML, or CMOS."
},
{
"number": "27",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "28",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "29",
"name": "LF1",
"type": "bidirectional",
"description": "APLL1 loop filter node; connect a 3.9 nF capacitor from this pin to pin 30 (LDO1)."
},
{
"number": "30",
"name": "LDO1",
"type": "input",
"description": "APLL1 loop filter voltage regulator bypass; connect a 0.1 µF capacitor from this pin to ground, which is the AC ground reference for the APLL1 loop filter."
},
{
"number": "31",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "32",
"name": "M0",
"type": "bidirectional",
"description": "Configurable CMOS status/control pin; its VIH and VOH follow VDDIOB and it has no internal resistor."
},
{
"number": "33",
"name": "M1",
"type": "bidirectional",
"description": "Configurable CMOS status/control pin; its VIH and VOH follow VDDIOB and it has no internal resistor."
},
{
"number": "34",
"name": "VDDIOB",
"type": "power_in",
"description": "Mx pin power supply for M0 to M4, valid at 1.8 V, 2.5 V, or 3.3 V; it can be connected to the VDD bus for 1.8 V operation."
},
{
"number": "35",
"name": "M2",
"type": "bidirectional",
"description": "Configurable CMOS status/control pin; its VIH and VOH follow VDDIOB and it has no internal resistor."
},
{
"number": "36",
"name": "M3",
"type": "bidirectional",
"description": "Configurable CMOS status/control pin with an internal 100 kΩ pull-down resistor; its VIH and VOH follow VDDIOB."
},
{
"number": "37",
"name": "M4",
"type": "bidirectional",
"description": "Configurable CMOS status/control pin with an internal 100 kΩ pull-down resistor; at start-up a logic 0 selects SPI mode (default) and a logic 1 selects I²C mode."
},
{
"number": "38",
"name": "REFB",
"type": "input",
"description": "Reference B input, internally biased and typically AC-coupled, accepting a differential signal with single-ended swing up to VDD; if DC-coupled it can be LVDS or 1.8 V CMOS."
},
{
"number": "39",
"name": "REFBB",
"type": "input",
"description": "Complementary REFB input when REFB is differential; no connection is needed if REFB is single-ended and REFBB is unused."
},
{
"number": "40",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "41",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "42",
"name": "XOA",
"type": "input",
"description": "System clock input, internally DC-biased and AC-coupled with a 0.01 µF capacitor unless a crystal is connected across XOA and XOB; single-ended CMOS input is possible but may cause spurs if the duty cycle is not 50%."
},
{
"number": "43",
"name": "XOB",
"type": "input",
"description": "Complementary system clock input, internally DC-biased and AC-coupled with a 0.1 µF capacitor unless a crystal is connected across XOA and XOB."
},
{
"number": "44",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "45",
"name": "VDD",
"type": "power_in",
"description": "1.8 V power supply pin."
},
{
"number": "46",
"name": "REFAA",
"type": "input",
"description": "Complementary REFA input when REFA is differential; if REFA is single-ended and REFAA is unused no connection is needed, and if DC-coupled the input is 1.8 V CMOS."
},
{
"number": "47",
"name": "REFA",
"type": "input",
"description": "Reference A input, internally biased and typically AC-coupled, accepting a differential signal with single-ended swing up to VDD; if DC-coupled it can be LVDS or 1.8 V CMOS."
},
{
"number": "48",
"name": "RESETB",
"type": "input",
"description": "Active-low chip reset with an internal 100 kΩ pull-up; asserting it puts the chip into reset, and its VIH follows VDDIOA."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Table 25 lists OUT1AN as type 'Input/Output' while its description says PLL1 complementary output 1A; LF0 and LF1 are listed as 'Input/output' in Table 25 but function as loop filter nodes; typed as bid; The exposed pad is labeled 'EP' rather than a numbered pin; included as a ground power_in entry. Tab",
"exposed pad 49 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 23,
"cost_usd": 0.1775,
"at": "2026-10-30T18:28:10"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9544.pdf",
"pages": 62,
"sha256": "9bdbe70837679cfe",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ad9544bcpz.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad9544bcpz-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "41c81a365d9ead252325cfe7fdfd4130934a53c4404647342f772f3119eb9eeb",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "CP-48-13",
"source_page": 62,
"D": {
"nom_mm": 7,
"range_mm": [
6.9,
7.1
]
},
"E1": {
"nom_mm": 7,
"range_mm": [
6.9,
7.1
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.75,
"range_mm": [
0.7,
0.8
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ad9544bcpz.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "LFCSP-48(7x7)",
"Category": "RTC/Clock Chip",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "9bdbe70837679cfe511acd906c19b65efb7f848cd2bcfe94d1b381a33f1d11f9",
"rows": [
{
"name": "Slew rate for sinusoidal input",
"symbol": "",
"kind": "electrical",
"unit": "V/µs",
"min": 20,
"typ": null,
"max": null,
"conditions": "Minimum input slew rate for device operation; jitter degradation may occur for slew rates < 35 V/µs",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Differential input amplitude (fIN < 500 MHz)",
"symbol": "",
"kind": "electrical",
"unit": "mV p-p",
"min": 350,
"typ": null,
"max": 2100,
"conditions": "fIN < 500 MHz; instantaneous voltage on either pin must not exceed 1.3 V",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Differential input amplitude (fIN = 500 to 750 MHz)",
"symbol": "",
"kind": "electrical",
"unit": "mV p-p",
"min": 500,
"typ": null,
"max": 2100,
"conditions": "fIN = 500 MHz to 750 MHz",
"source_page": 7,
"source": "datasheet"
},
{
"name": "DC-coupled LVDS-compatible mode common-mode input voltage",
"symbol": "",
"kind": "electrical",
"unit": "V",
"min": 1.125,
"typ": null,
"max": 1.375,
"conditions": "Applies for dc coupling to an LVDS source",
"source_page": 7,
"source": "datasheet"
},
{
"name": "DC-coupled LVDS-compatible mode differential input amplitude",
"symbol": "",
"kind": "electrical",
"unit": "mV p-p",
"min": 400,
"typ": null,
"max": 1200,
"conditions": "Differential voltage across pins required to ensure switching between logic levels",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Input amplitude (single-ended, AC-coupled mode)",
"symbol": "",
"kind": "electrical",
"unit": "mV p-p",
"min": 360,
"typ": null,
"max": 1200,
"conditions": "Peak-to-peak single-ended swing; instantaneous voltage must not exceed 1.3 V",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Validation timer",
"symbol": "",
"kind": "electrical",
"unit": "sec",
"min": 0.001,
"typ": null,
"max": 1048,
"conditions": "Programmable in 1 ms increments",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Excess jitter alarm threshold",
"symbol": "",
"kind": "electrical",
"unit": "ns",
"min": 1,
"typ": null,
"max": 65535,
"conditions": "Programmable in 1 ns increments",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Phase slew limiter",
"symbol": "",
"kind": "electrical",
"unit": "µs/sec",
"min": 0.001,
"typ": null,
"max": 250,
"conditions": "See AN-1420 Application Note",
"source_page": 8,
"source": "datasheet"
},
{
"name": "HCSL differential output voltage swing (7.5 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 312,
"typ": 368,
"max": 402,
"conditions": "Output current 7.5 mA; terminated per Figure 32",
"source_page": 9,
"source": "datasheet"
},
{
"name": "CML differential output voltage swing (7.5 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 257,
"typ": 348,
"max": 408,
"conditions": "Output current 7.5 mA; terminated to VDD (1.8 V) per Figure 33",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL differential output voltage swing (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 631,
"typ": 745,
"max": 809,
"conditions": "Output current 15 mA; terminated per Figure 32",
"source_page": 9,
"source": "datasheet"
},
{
"name": "CML differential output voltage swing (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 578,
"typ": 729,
"max": 818,
"conditions": "Output current 15 mA; terminated to VDD (1.8 V) per Figure 33",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL common-mode output voltage (7.5 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 155,
"typ": 184,
"max": 201,
"conditions": "Output current 7.5 mA; terminated per Figure 32",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL common-mode output voltage (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 316,
"typ": 372,
"max": 405,
"conditions": "Output current 15 mA; terminated per Figure 32",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL single-ended voltage swing peak-to-peak (12 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 509,
"typ": 584,
"max": 634,
"conditions": "Output current 12 mA; each output terminated per Figure 37 with RL = 50 Ω",
"source_page": 9,
"source": "datasheet"
},
{
"name": "CML single-ended voltage swing peak-to-peak (12 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 456,
"typ": 565,
"max": 644,
"conditions": "Output current 12 mA; RL = 50 Ω connected to VDD (1.8 V)",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL single-ended voltage swing midpoint (12 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 255,
"typ": 292,
"max": 317,
"conditions": "Output current 12 mA; each output terminated per Figure 37 with RL = 50 Ω",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL single-ended voltage swing peak-to-peak (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 645,
"typ": 734,
"max": 796,
"conditions": "Output current 15 mA; each output terminated per Figure 37 with RL = 50 Ω",
"source_page": 9,
"source": "datasheet"
},
{
"name": "CML single-ended voltage swing peak-to-peak (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 589,
"typ": 721,
"max": 815,
"conditions": "Output current 15 mA; RL = 50 Ω connected to VDD (1.8 V)",
"source_page": 9,
"source": "datasheet"
},
{
"name": "HCSL single-ended voltage swing midpoint (15 mA)",
"symbol": "",
"kind": "electrical",
"unit": "mV",
"min": 322,
"typ": 367,
"max": 398,
"conditions": "Output current 15 mA; each output terminated per Figure 37 with RL = 50 Ω",
"source_page": 9,
"source": "datasheet"
},
{
"name": "1.8 V Supply Voltage (VDD)",
"symbol": "VDD",
"kind": "absolute_maximum",
"unit": "V",
"min": null,
"typ": null,
"max": 2,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Input/Output Supply Voltage (VDDIOA, VDDIOB)",
"symbol": "VDDIOA, VDDIOB",
"kind": "absolute_maximum",
"unit": "V",
"min": null,
"typ": null,
"max": 3.6,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Input voltage range (XOA, XOB, REFA, REFAA, REFB, REFBB)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.5,
"typ": null,
"max": null,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Digital input voltage range (SDO/M5, SCLK/SCL, SDIO/SDA, CSB/M6)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.5,
"typ": null,
"max": null,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Digital input voltage range (M0, M1, M2, M3, M4)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.5,
"typ": null,
"max": null,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Storage temperature range",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Operating temperature range",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 85,
"conditions": "See Thermal Resistance section",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Lead temperature (soldering)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 300,
"conditions": "Soldering 10 sec",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Junction-to-ambient thermal resistance (still air)",
"symbol": "θJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 23.9,
"max": null,
"conditions": "0.0 m/sec airflow, JEDEC JESD51-2; package CP-48-132",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Junction-to-ambient thermal resistance (moving air, 1.0 m/s)",
"symbol": "θJMA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 19.4,
"max": null,
"conditions": "1.0 m/sec airflow, JEDEC JESD51-6",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Junction-to-ambient thermal resistance (moving air, 2.5 m/s)",
"symbol": "θJMA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 18.2,
"max": null,
"conditions": "2.5 m/sec airflow, JEDEC JESD51-6",
"source_page": 19,
"source": "datasheet"
},
{
"name": "Junction-to-case thermal resistance",
"symbol": "θJC",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 1.5,
"max": null,
"conditions": "Die to heat sink, MIL-STD 883 Method 1012.1",
"source_page": 19,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ad9544bcpz"
],
"discovery_pitch": "AD9544BCPZ (Analog Devices) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ad9544bcpz.kicad_sym",
"ad9544bcpz.kicad_mod",
"ad9544bcpz.glb",
"ad9544bcpz.step",
"ad9544bcpz.lbr",
"docs/hero.png",
"docs/ad9544bcpz-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ad9544bcpz-hero.glb",
"ad9544bcpz-hero.overlay.json",
"ad9544bcpz-etched.glb"
],
"visibility": {
"public": true
}
}