component
AD9517-4ABCPZ
Public Made by Adomby adom
Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"rtc-clock chip",
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"component": {
"mpn": "AD9517-4ABCPZ",
"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9517-4.pdf",
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"distributor_links": {
"lcsc": "C653513",
"digikey": "505-AD9517-4ABCPZ-ND",
"mouser": "584-AD9517-4ABCPZ"
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"status": "found"
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"pins": [
{
"number": "1",
"name": "REFMON",
"type": "output",
"description": "Reference monitor output, a 3.3 V CMOS pin with multiple selectable functions set by Register 0x01B."
},
{
"number": "2",
"name": "LD",
"type": "output",
"description": "Lock detect output, a 3.3 V CMOS pin with multiple selectable functions set by Register 0x01A."
},
{
"number": "3",
"name": "VCP",
"type": "power_in",
"description": "Charge pump supply, which must satisfy VS ≤ VCP ≤ 5.0 V; it is usually 3.3 V, but must be 5 V when a 5 V external VCXO is used."
},
{
"number": "4",
"name": "CP",
"type": "output",
"description": "Charge pump output that connects to the external loop filter."
},
{
"number": "5",
"name": "STATUS",
"type": "output",
"description": "Status output, a 3.3 V CMOS pin with multiple selectable functions set by Register 0x017."
},
{
"number": "6",
"name": "REF_SEL",
"type": "input",
"description": "Reference select input that selects REF1 when low and REF2 when high, with an internal 30 kΩ pull-down resistor."
},
{
"number": "7",
"name": "SYNC",
"type": "input",
"description": "Active-low input for manual synchronization and manual holdover, edge sensitive, with an internal 30 kΩ pull-up resistor."
},
{
"number": "8",
"name": "LF",
"type": "input",
"description": "Loop filter input connected internally to the VCO control voltage node, with 31 pF of internal capacitance to ground that may affect loop filter design for large loop bandwidths."
},
{
"number": "9",
"name": "BYPASS",
"type": "output",
"description": "Pin for bypassing the LDO to ground with a capacitor."
},
{
"number": "10",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "11",
"name": "CLK",
"type": "input",
"description": "Complementary half of the self-biased differential clock input to the clock distribution section; it can be left floating when the internal VCO is used."
},
{
"number": "12",
"name": "CLK",
"type": "input",
"description": "Complementary half of the self-biased differential clock input to the clock distribution section; it can be left floating when the internal VCO is used."
},
{
"number": "13",
"name": "SCLK",
"type": "input",
"description": "Serial control port data clock input, a 3.3 V CMOS pin; write data is registered on its rising edge."
},
{
"number": "14",
"name": "CS",
"type": "input",
"description": "Serial control port active-low chip select, a 3.3 V CMOS pin with an internal 30 kΩ pull-up resistor."
},
{
"number": "15",
"name": "SDO",
"type": "output",
"description": "Serial control port unidirectional serial data output, used for readback only in unidirectional mode."
},
{
"number": "16",
"name": "SDIO",
"type": "bidirectional",
"description": "Serial control port bidirectional serial data input/output, also used as unidirectional serial data input."
},
{
"number": "17",
"name": "RESET",
"type": "input",
"description": "Active-low chip reset, a 3.3 V CMOS pin with an internal 30 kΩ pull-up resistor."
},
{
"number": "18",
"name": "PD",
"type": "input",
"description": "Active-low chip power-down, a 3.3 V CMOS pin with an internal 30 kΩ pull-up resistor."
},
{
"number": "19",
"name": "OUT2",
"type": "output",
"description": "LVPECL output, one side of a differential LVPECL output pair (OUT2)."
},
{
"number": "20",
"name": "OUT2",
"type": "output",
"description": "LVPECL output, the other side of the differential LVPECL output pair (OUT2)."
},
{
"number": "21",
"name": "VS_LVPECL",
"type": "power_in",
"description": "Extended-voltage LVPECL power pin, operating from 2.5 V to 3.3 V."
},
{
"number": "22",
"name": "OUT3",
"type": "output",
"description": "LVPECL output, one side of a differential LVPECL output pair (OUT3)."
},
{
"number": "23",
"name": "OUT3",
"type": "output",
"description": "LVPECL output, the other side of the differential LVPECL output pair (OUT3)."
},
{
"number": "24",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "25",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "26",
"name": "OUT6 (OUT6A)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "27",
"name": "OUT6 (OUT6B)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "28",
"name": "OUT7 (OUT7A)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "29",
"name": "OUT7 (OUT7B)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "30",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "31",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "32",
"name": "OUT5 (OUT5B)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "33",
"name": "OUT5 (OUT5A)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "34",
"name": "OUT4 (OUT4B)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "35",
"name": "OUT4 (OUT4A)",
"type": "output",
"description": "LVDS or CMOS output, one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "36",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "37",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "38",
"name": "OUT1",
"type": "output",
"description": "LVPECL output, one side of a differential LVPECL output pair (OUT1)."
},
{
"number": "39",
"name": "OUT1",
"type": "output",
"description": "LVPECL output, the other side of the differential LVPECL output pair (OUT1)."
},
{
"number": "40",
"name": "VS_LVPECL",
"type": "power_in",
"description": "Extended-voltage LVPECL power pin, operating from 2.5 V to 3.3 V."
},
{
"number": "41",
"name": "OUT0",
"type": "output",
"description": "LVPECL output, one side of a differential LVPECL output pair (OUT0)."
},
{
"number": "42",
"name": "OUT0",
"type": "output",
"description": "LVPECL output, the other side of the differential LVPECL output pair (OUT0)."
},
{
"number": "43",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "44",
"name": "RSET",
"type": "passive",
"description": "Resistor connection that sets internal bias currents; nominal value is 4.12 kΩ."
},
{
"number": "45",
"name": "VS",
"type": "power_in",
"description": "3.3 V power supply pin."
},
{
"number": "46",
"name": "CPRSET",
"type": "passive",
"description": "Resistor connection that sets the charge pump current range; nominal value is 5.1 kΩ."
},
{
"number": "47",
"name": "REFIN (REF2)",
"type": "input",
"description": "Complementary half of the self-biased differential PLL reference input; alternatively a single-ended input for REF2."
},
{
"number": "48",
"name": "REFIN (REF1)",
"type": "input",
"description": "Complementary half of the self-biased differential PLL reference input; alternatively a single-ended input for REF1."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
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],
"pages_sent": 16,
"cost_usd": 0.0453,
"at": "2026-10-28T16:00:17"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9517-4.pdf",
"pages": 80,
"sha256": "7e51d35117a7c7bb",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
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