component
AD9245BCPZ-80
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), LFCSP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "Analog Devices Analog To Digital Converters (ADCs), LFCSP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"data converters",
"ad9245bcpz-80",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"ad9245bcpz-80.lbr",
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"docs/ad9245bcpz-80-datasheet.pdf",
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],
"component": {
"mpn": "AD9245BCPZ-80",
"manufacturer": "Analog Devices",
"package": "LFCSP-32(5x5)",
"pin_count": 33,
"category": "Data Converters",
"subcategory": "Analog To Digital Converters (ADCs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9245.pdf",
"parts": {
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"lbr": "ad9245bcpz-80.lbr"
},
"distributor_links": {
"lcsc": "C578827",
"digikey": "505-AD9245BCPZ-80-ND",
"mouser": "584-AD9245BCPZ-80"
},
"distributor_check": {
"checked_at": "2026-11-02T17:35:33Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-AD9245BCPZ-80-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD9245BCPZ-80",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "DNC",
"type": "unconnected",
"description": "Do Not Connect; this pin must not be connected to anything."
},
{
"number": "2",
"name": "CLK",
"type": "input",
"description": "Single-ended clock input that controls all internal conversion cycles."
},
{
"number": "3",
"name": "DNC",
"type": "unconnected",
"description": "Do Not Connect; this pin must not be connected to anything."
},
{
"number": "4",
"name": "PDWN",
"type": "input",
"description": "Power-down function select input for the converter."
},
{
"number": "5",
"name": "D0",
"type": "output",
"description": "Data output bit D0 (LSB), driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "6",
"name": "D1",
"type": "output",
"description": "Data output bit D1, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "7",
"name": "D2",
"type": "output",
"description": "Data output bit D2, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "8",
"name": "D3",
"type": "output",
"description": "Data output bit D3, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "9",
"name": "D4",
"type": "output",
"description": "Data output bit D4, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "10",
"name": "D5",
"type": "output",
"description": "Data output bit D5, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "11",
"name": "D6",
"type": "output",
"description": "Data output bit D6, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "12",
"name": "D7",
"type": "output",
"description": "Data output bit D7, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "13",
"name": "D8",
"type": "output",
"description": "Data output bit D8, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "14",
"name": "D9",
"type": "output",
"description": "Data output bit D9, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "15",
"name": "DGND",
"type": "power_in",
"description": "Digital output ground; return path for the output driver supply DRVDD."
},
{
"number": "16",
"name": "DRVDD",
"type": "power_in",
"description": "Digital output driver supply, 2.25 V to 3.6 V (3.0 V typical) per the DC specifications."
},
{
"number": "17",
"name": "D10",
"type": "output",
"description": "Data output bit D10, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "18",
"name": "D11",
"type": "output",
"description": "Data output bit D11, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "19",
"name": "D12",
"type": "output",
"description": "Data output bit D12, driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "20",
"name": "D13",
"type": "output",
"description": "Data output bit D13 (MSB), driven from DRVDD logic levels (2.5 V or 3.3 V logic families)."
},
{
"number": "21",
"name": "OTR",
"type": "output",
"description": "Out-of-range indicator that signals an overflow condition when the input is beyond the selected input range."
},
{
"number": "22",
"name": "MODE",
"type": "input",
"description": "Data format select and DCS mode selection pin; selects offset binary or twos complement output and the clock duty-cycle stabilizer mode (see Table 11)."
},
{
"number": "23",
"name": "SENSE",
"type": "input",
"description": "Reference mode selection pin that configures internal or external reference operation (see Table 10)."
},
{
"number": "24",
"name": "VREF",
"type": "power_in",
"description": "Voltage reference input/output pin for the on-chip reference."
},
{
"number": "25",
"name": "REFB",
"type": "passive",
"description": "Differential reference negative (-) terminal."
},
{
"number": "26",
"name": "REFT",
"type": "passive",
"description": "Differential reference positive (+) terminal."
},
{
"number": "27",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, 2.7 V to 3.6 V (3.0 V typical) per the DC specifications."
},
{
"number": "28",
"name": "AGND",
"type": "power_in",
"description": "Analog ground pin."
},
{
"number": "29",
"name": "VIN+",
"type": "power_in",
"description": "Positive analog input pin of the differential input; the 1 V p-p to 2 V p-p input span is set by the reference mode."
},
{
"number": "30",
"name": "VIN-",
"type": "power_in",
"description": "Negative analog input pin of the differential input; forms a differential pair with VIN+."
},
{
"number": "31",
"name": "AGND",
"type": "power_in",
"description": "Analog ground pin."
},
{
"number": "32",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, 2.7 V to 3.6 V (3.0 V typical) per the DC specifications."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Table 9 gives the data bit pins as ranges (5 to 14 and 17 to 20). The per-pin bit assignment (pins 5; The exposed paddle (EPAD) is listed in Table 9 as a non-numbered terminal; it is included here as a "
],
"pages_sent": 9,
"cost_usd": 0.0233,
"at": "2026-11-02T17:35:22"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9245.pdf",
"pages": 32,
"sha256": "8fa61d01efdba4ad",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-11-02",
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}