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AD8675ARZ

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Analog Devices Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD8675ARZ

Analog Devices · Operational Amplifier · SOIC-8

AD8675ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null pin; the datasheet's optional nulling circuit uses a 100 kΩ trim network to compensate up to ±3.5 mV of system offset, and the absolute maximum input current on this pin is <50 µA with VS < V+.
2 -IN input Inverting input, with an input voltage range of −3.0 V to +3.0 V at ±5 V supplies and −12.5 V to +12.5 V at ±15 V supplies, and an absolute maximum input voltage of ±V supply.
3 +IN input Non-inverting input, with an input voltage range of −3.0 V to +3.0 V at ±5 V supplies and −12.5 V to +12.5 V at ±15 V supplies, and an absolute maximum input voltage of ±V supply.
4 V- power_in Negative supply; the amplifier operates from ±5 V to ±18 V with an absolute maximum supply of ±18 V.
5 NC unconnected No connect; the datasheet marks this pin as NO CONNECT.
6 OUT output Amplifier output with rail-to-rail swing, typically 4.95 V high and −4.90 V low into 10 kΩ at ±5 V supplies, with a short-circuit limit of ±35 mA.
7 V+ power_in Positive supply; the amplifier operates from ±5 V to ±18 V with an absolute maximum supply of ±18 V.
8 NULL passive Offset null pin; the datasheet's optional nulling circuit uses a 100 kΩ trim network to compensate up to ±3.5 mV of system offset, and the absolute maximum input current on this pin is <50 µA with VS < V+.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
[VS=±5 V] Offset Voltage VOS 10 75 µV 3
[VS=±5 V] Offset Voltage VOS 12 240 µV −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Offset Voltage Drift ΔVOS/ΔT 0.2 0.6 µV/°C −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Input Bias Current IB -2 0.5 2 nA 3
[VS=±5 V] Input Bias Current IB -5.5 -2 5.5 nA −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Input Offset Current IOS -1 0.1 1 nA 3
[VS=±5 V] Input Offset Current IOS -2.8 0.1 2.8 nA −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Input Voltage Range IVR -3 3 V 3
[VS=±5 V] Common-Mode Rejection Ratio CMRR 105 130 dB VCM = −3.0 V to +3.0 V 3
[VS=±5 V] Common-Mode Rejection Ratio CMRR 105 dB −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Open-Loop Gain AVO 120 126 dB RL = 2 kΩ to ground, VO = −3.5 V to +3.5 V 3
[VS=±5 V] Open-Loop Gain AVO 117 dB −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Output Voltage High VOH 4.9 4.95 V RL = 10 kΩ to ground 3
[VS=±5 V] Output Voltage High VOH 4.85 V −40°C ≤ TA ≤ +125°C; RL = 10 kΩ to ground 3
[VS=±5 V] Output Voltage High VOH 4.8 4.9 V RL = 2 kΩ to ground 3
[VS=±5 V] Output Voltage High VOH 4.75 V −40°C ≤ TA ≤ +125°C; RL = 2 kΩ to ground 3
[VS=±5 V] Output Voltage Low VOL -4.98 -4.9 V RL = 10 kΩ to ground 3
[VS=±5 V] Output Voltage Low VOL -4.85 V −40°C ≤ TA ≤ +125°C; RL = 10 kΩ to ground 3
[VS=±5 V] Output Voltage Low VOL -4.91 -4.86 V RL = 2 kΩ to ground 3
[VS=±5 V] Output Voltage Low VOL -4.82 V −40°C ≤ TA ≤ +125°C; RL = 2 kΩ to ground 3
[VS=±5 V] Short-Circuit Limit ISC -35 35 mA 3
[VS=±5 V] Power Supply Rejection Ratio PSRR 120 140 dB VS = ±5.0 V to ±15.0 V 3
[VS=±5 V] Power Supply Rejection Ratio PSRR 120 dB −40°C ≤ TA ≤ +125°C 3
[VS=±5 V] Supply Current/Amplifier ISY 2.3 2.7 mA VO = 0 V 3
[VS=±5 V] Supply Current/Amplifier ISY 3.4 mA −40°C ≤ TA ≤ +125°C; VO = 0 V 3
[VS=±15 V] Offset Voltage VOS 10 75 µV 4
[VS=±15 V] Offset Voltage VOS 12 240 µV −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Offset Voltage Drift ΔVOS/ΔT 0.2 0.6 µV/°C −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Input Bias Current IB -2 0.5 2 nA 4
[VS=±15 V] Input Bias Current IB -4.5 1 4.5 nA −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Input Offset Current IOS -1 0.1 1 nA 4
[VS=±15 V] Input Offset Current IOS -2.8 0.1 2.8 nA −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Input Voltage Range IVR -12.5 12.5 V 4
[VS=±15 V] Common-Mode Rejection Ratio CMRR 114 130 dB VCM = −12.5 V to +12.5 V 4
[VS=±15 V] Common-Mode Rejection Ratio CMRR 114 dB −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Open-Loop Gain AVO 123 132 dB RL = 2 kΩ to ground, VO = −13.5 V to +13.5 V 4
[VS=±15 V] Open-Loop Gain AVO 117 dB −40°C ≤ TA ≤ +125°C 4
[VS=±15 V] Output Voltage High VOH 14.85 14.92 V RL = 10 kΩ to ground 4
[VS=±15 V] Output Voltage High VOH 14.8 V −40°C ≤ TA ≤ +125°C; RL = 10 kΩ to ground 4
[VS=±15 V] Output Voltage High VOH 14.6 14.8 V RL = 2 kΩ to ground 4
[VS=±15 V] Output Voltage High VOH 14.4 V −40°C ≤ TA ≤ +125°C; RL = 2 kΩ to ground 4
[VS=±15 V] Output Voltage Low VOL -14.96 -14.94 V RL = 10 kΩ to ground 4
[VS=±15 V] Output Voltage Low VOL -14.9 V −40°C ≤ TA ≤ +125°C; RL = 10 kΩ to ground 4
[VS=±15 V] Output Voltage Low VOL -14.85 -14.75 V RL = 2 kΩ to ground 4
[VS=±15 V] Output Voltage Low VOL -14.69 V −40°C ≤ TA ≤ +125°C; RL = 2 kΩ to ground 4
[VS=±15 V] Short-Circuit Limit ISC -35 35 mA 4
[VS=±15 V] Power Supply Rejection Ratio PSRR 120 140 dB VS = ±5.0 V to ±15.0 V 4
[VS=±15 V] Supply Current/Amplifier ISY 2.5 2.9 mA VO = 0 V 4
[VS=±15 V] Supply Current/Amplifier ISY 3.8 mA −40°C ≤ TA ≤ +125°C; VO = 0 V 4
Supply Voltage (absolute maximum) -18 18 V Printed as ±18 V 5
Input Current -5 5 mA 5
Differential Input Voltage -0.7 0.7 V 5
Storage Temperature Range -65 150 °C RM-8, R-8 packages 5
Operating Temperature Range -40 125 °C 5
Junction Temperature Range -65 150 °C RM-8, R-8 packages 5
Lead Temperature Range 300 °C Soldering, 10 sec 5
NULL Pins (Pin 1, Pin 8) Input Current Maximum 50 µA VS < V+ (printed as <50 µA) 5
Thermal Resistance, Junction-to-Ambient (8-Lead SOIC_N, R-8) θJA 120 °C/W Worst-case, device soldered on standard 4-layer board 5
Thermal Resistance, Junction-to-Case (8-Lead SOIC_N, R-8) θJC 45 °C/W 5
Supply Voltage Operation Range (each supply, ±) 5 18 V Features list: ±5 V to ±18 V operation 1

CAD (KiCad official)

  • Symbol: AD8675ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8675arz-etched.step / ad8675arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8675arz.step / ad8675arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 2aaff714900693da, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF