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AD8652ARZ

Analog Devices · Operational Amplifier · SOIC-8

AD8652ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of amplifier A; rail-to-rail output stage with output current rated at 40 mA.
2 -IN A input Inverting input of amplifier A; input common-mode range is -0.1 V to +2.8 V at a 2.7 V supply.
3 +IN A input Noninverting input of amplifier A; input common-mode range is -0.1 V to +2.8 V at a 2.7 V supply, and input voltage must stay between GND and VS + 0.3 V.
4 V- power_in Negative supply rail (GND in single-supply operation); input voltage must not exceed GND to VS + 0.3 V.
5 +IN B input Noninverting input of amplifier B; input common-mode range is -0.1 V to +2.8 V at a 2.7 V supply, and input voltage must stay between GND and VS + 0.3 V.
6 -IN B input Inverting input of amplifier B; input common-mode range is -0.1 V to +2.8 V at a 2.7 V supply.
7 OUT B output Output of amplifier B; rail-to-rail output stage with output current rated at 40 mA.
8 V+ power_in Positive supply rail; single-supply operation from 2.7 V to 5.5 V, with absolute maximum supply voltage of 6.0 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage VOS 90 300 μV 0 V ≤ VCM ≤ 2.7 V, V+ = 2.7 V 3
Offset Voltage over temperature VOS 0.4 1.3 mV -40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 2.7 V 3
Input Bias Current IB 1 10 pA 3
Input Bias Current over temperature IB 600 pA -40°C ≤ TA ≤ +125°C 3
Input Bias Current over temperature IB 30 pA -40°C ≤ TA ≤ +85°C 4
Input Offset Current IOS 1 10 pA 3
Input Offset Current over temperature IOS 30 pA -40°C ≤ TA ≤ +85°C 3
Input Offset Current over temperature IOS 600 pA -40°C ≤ TA ≤ +125°C 3
Input Voltage Range VCM -0.1 2.8 V V+ = 2.7 V 3
Common-Mode Rejection Ratio CMRR 77 95 dB V+ = 2.7 V, -0.1 V < VCM < +2.8 V 3
Common-Mode Rejection Ratio over temperature CMRR 73 90 dB -40°C ≤ TA ≤ +125°C, -0.1 V < VCM < +2.8 V 3
Large Signal Voltage Gain AVO 100 115 dB RL = 1 kΩ, 200 mV < VO < 2.5 V 3
Large Signal Voltage Gain at TA = 125°C AVO 95 108 dB RL = 1 kΩ, 200 mV < VO < 2.5 V, TA = 125°C 3
Power Supply Rejection Ratio PSRR 76 94 dB VS = 2.7 V to 5.5 V, VCM = 0 V 3
Power Supply Rejection Ratio over temperature PSRR 74 93 dB -40°C ≤ TA ≤ +125°C, VS = 2.7 V to 5.5 V, VCM = 0 V 3
Supply Current ISY 17.5 19.5 mA IO = 0, V+ = 2.7 V 3
Supply Current over temperature ISY 22.5 mA -40°C ≤ TA ≤ +125°C, V+ = 2.7 V 3
Offset Voltage VOS 90 300 μV 0 V ≤ VCM ≤ 5 V, V+ = 5 V 4
Offset Voltage over temperature VOS 0.4 1.4 mV -40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 5 V, V+ = 5 V 4
Input Voltage Range VCM -0.1 5.1 V V+ = 5 V 4
Common-Mode Rejection Ratio CMRR 84 100 dB V+ = 5 V, 0.1 V < VCM < 5.1 V 4
Common-Mode Rejection Ratio over temperature CMRR 76 95 dB -40°C ≤ TA ≤ +125°C, V+ = 5 V, 0.1 V < VCM < 5.1 V 4
Large Signal Voltage Gain AVO 100 115 dB V+ = 5 V, RL = 1 kΩ, 200 mV < VO < 4.8 V 4
Large Signal Voltage Gain at TA = 125°C AVO 95 111 dB V+ = 5 V, RL = 1 kΩ, 200 mV < VO < 4.8 V, TA = 125°C 4
Supply Current ISY 17.5 20 mA IO = 0, V+ = 5 V 4
Supply Current over temperature ISY 23.5 mA -40°C ≤ TA ≤ +125°C, V+ = 5 V 4
Offset Voltage Drift TCVOS 4 μV/°C 3
Supply Voltage 6 V 5
Differential Input Voltage -6 6 V 5
Electrostatic Discharge (HBM) 4000 V Human body model 5
Operating Temperature Range TA -40 125 °C 5
Storage Temperature Range -65 150 °C RM, R package 5
Junction Temperature Range -65 150 °C RM, R package 5
Lead Temperature (Soldering) 300 °C Soldering, 10 sec 5
Thermal Resistance, junction to ambient θJA 158 °C/W 8-Lead SOIC_N (R), device soldered in circuit board, worst case 5
Thermal Resistance, junction to case θJC 43 °C/W 8-Lead SOIC_N (R) 5
Single-Supply Operating Voltage 2.7 5.5 V Single-supply operation 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Poor PC board layout, contaminants, and the board insulator 15

CAD (KiCad official)

  • Symbol: AD8652ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8652arz-etched.step / ad8652arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8652arz.step / ad8652arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 7105eff6fa1fb3ea, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF