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AD8651ARZ

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Analog Devices Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD8651ARZ

Analog Devices · Operational Amplifier · SOIC-8

AD8651ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect pin, marked NC in the datasheet pin configuration figure for the 8-Lead SOIC_N package.
2 -IN input Inverting input; the input common-mode voltage range is -0.1 V to +2.8 V at V+ = 2.7 V and -0.1 V to +5.1 V at V+ = 5 V.
3 +IN input Non-inverting input with rail-to-rail input stage, so the common-mode range extends to both supply rails.
4 V- power_in Negative supply rail, 0 V in the datasheet test conditions; absolute maximum supply voltage is 6.0 V and operation is specified from 2.7 V to 5.5 V single supply.
5 NC unconnected No connect pin, marked NC in the datasheet pin configuration figure for the 8-Lead SOIC_N package.
6 OUT output Amplifier output with rail-to-rail swing; the datasheet states 40 mA output current and 80 mA short-circuit limit for sourcing and sinking.
7 V+ power_in Positive supply rail; the amplifier runs from 2.7 V to 5.5 V single-supply, with an absolute maximum supply voltage of 6.0 V.
8 NC unconnected No connect pin, marked NC in the datasheet pin configuration figure for the 8-Lead SOIC_N package.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage VOS 100 350 µV V+ = 2.7 V; AD8651 0 V ≤ VCM ≤ 2.7 V 3
Offset Voltage VOS 1.4 mV V+ = 2.7 V; -40°C ≤ TA ≤ +85°C, 0 V ≤ VCM ≤ 2.7 V 3
Offset Voltage VOS 1.6 mV V+ = 2.7 V; -40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 2.7 V 3
Offset Voltage VOS 1.7 mV V+ = 5 V; -40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 5 V 4
Input Bias Current IB 1 10 pA V+ = 2.7 V 3
Input Bias Current IB 600 pA V+ = 2.7 V; -40°C ≤ TA ≤ +125°C 3
Input Bias Current IB 30 pA V+ = 5 V; -40°C ≤ TA ≤ +85°C 4
Input Offset Current IOS 1 10 pA V+ = 2.7 V 3
Input Offset Current IOS 30 pA V+ = 2.7 V; -40°C ≤ TA ≤ +85°C 3
Input Offset Current IOS 600 pA V+ = 2.7 V; -40°C ≤ TA ≤ +125°C 3
Input Voltage Range VCM -0.1 2.8 V V+ = 2.7 V 3
Input Voltage Range VCM -0.1 5.1 V V+ = 5 V 4
Common-Mode Rejection Ratio CMRR 75 95 dB V+ = 2.7 V; AD8651 -0.1 V < VCM < +2.8 V 3
Common-Mode Rejection Ratio CMRR 70 88 dB V+ = 2.7 V; -40°C ≤ TA ≤ +85°C, -0.1 V < VCM < +2.8 V 3
Common-Mode Rejection Ratio CMRR 65 85 dB V+ = 2.7 V; -40°C ≤ TA ≤ +125°C, -0.1 V < VCM < +2.8 V 3
Common-Mode Rejection Ratio CMRR 80 95 dB V+ = 5 V; AD8651 0.1 V < VCM < 5.1 V 4
Common-Mode Rejection Ratio CMRR 75 94 dB V+ = 5 V; -40°C ≤ TA ≤ +85°C, 0.1 V < VCM < 5.1 V 4
Common-Mode Rejection Ratio CMRR 70 90 dB V+ = 5 V; -40°C ≤ TA ≤ +125°C, 0.1 V < VCM < 5.1 V 4
Large Signal Voltage Gain AVO 100 115 dB V+ = 2.7 V; RL = 1 kΩ, 200 mV < VO < 2.5 V 3
Large Signal Voltage Gain AVO 100 114 dB V+ = 2.7 V; RL = 1 kΩ, 200 mV < VO < 2.5 V, TA = 85°C 3
Large Signal Voltage Gain AVO 95 108 dB V+ = 2.7 V; RL = 1 kΩ, 200 mV < VO < 2.5 V, TA = 125°C 3
Large Signal Voltage Gain AVO 100 115 dB V+ = 5 V; RL = 1 kΩ, 200 mV < VO < 4.8 V 4
Large Signal Voltage Gain AVO 98 114 dB V+ = 5 V; RL = 1 kΩ, 200 mV < VO < 4.8 V, TA = 85°C 4
Large Signal Voltage Gain AVO 95 111 dB V+ = 5 V; RL = 1 kΩ, 200 mV < VO < 4.8 V, TA = 125°C 4
Output Voltage High VOH 2.67 V V+ = 2.7 V; IL = 250 µA, -40°C ≤ TA ≤ +125°C 3
Output Voltage High VOH 4.97 V V+ = 5 V; IL = 250 µA, -40°C ≤ TA ≤ +125°C 4
Output Voltage Low VOL 30 mV V+ = 2.7 V; IL = 250 µA, -40°C ≤ TA ≤ +125°C 3
Output Voltage Low VOL 30 mV V+ = 5 V; IL = 250 µA, -40°C ≤ TA ≤ +125°C 4
Power Supply Rejection Ratio PSRR 76 94 dB V+ = 2.7 V; VS = 2.7 V to 5.5 V, VCM = 0 V 3
Power Supply Rejection Ratio PSRR 74 93 dB V+ = 2.7 V; -40°C ≤ TA ≤ +125°C 3
Supply Current ISY 9 12 mA V+ = 2.7 V; AD8651 IO = 0 3
Supply Current ISY 14.5 mA V+ = 2.7 V; -40°C ≤ TA ≤ +125°C 3
Supply Current ISY 9.5 14 mA V+ = 5 V; AD8651 IO = 0 4
Supply Current ISY 15 mA V+ = 5 V; -40°C ≤ TA ≤ +125°C 4
Supply Voltage 6 V Absolute maximum rating 5
Differential Input Voltage -6 6 V Absolute maximum rating 5
Operating Temperature Range -40 125 °C Absolute maximum rating 5
Storage Temperature Range -65 150 °C RM, R Package 5
Junction Temperature Range -65 150 °C RM, R Package 5
Lead Temperature (Soldering) 300 °C 10 sec 5
Electrostatic Discharge (HBM) 4000 V Human body model 5
Single Supply Voltage 2.7 5.5 V Single-supply operation 1
Offset Voltage Drift TCVOS 4 µV/°C V+ = 2.7 V 3
Input Capacitance Differential CIN 6 pF Differential 3
Input Capacitance Common Mode CIN 9 pF Common Mode 3
Slew Rate SR 41 V/µs G = 1, RL = 10 kΩ 3
Gain Bandwidth Product GBP 50 MHz G = 1 3
Settling Time, 0.01% 0.2 µs G = ±1, 2 V step 3
Overload Recovery Time 0.1 µs VIN × G = 1.48 V 3
Total Harmonic Distortion + Noise THD + N 0.0006 % G = 1, RL = 600 Ω, f = 1 kHz, VIN = 2 V p-p 3
Voltage Noise Density en 5 nV/√Hz f = 10 kHz 3
Voltage Noise Density en 4.5 nV/√Hz f = 100 kHz 3
Current Noise Density in 4 fA/√Hz f = 10 kHz 3
Short-Circuit Limit Sourcing ISC 80 mA Sourcing 3
Short-Circuit Limit Sinking ISC 80 mA Sinking 3
Output Current IO 40 mA 3
Thermal Resistance Junction-to-Ambient 8-Lead SOIC_N θJA 158 °C/W 8-Lead SOIC_N (R); worst-case, device soldered in circuit board 5
Thermal Resistance Junction-to-Case 8-Lead SOIC_N θJC 43 °C/W 8-Lead SOIC_N (R) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Poor PC board layout, contaminants, and the board insulator 15

CAD (KiCad official)

  • Symbol: AD8651ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8651arz-etched.step / ad8651arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8651arz.step / ad8651arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 7105eff6fa1fb3ea, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF