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README

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AD8510ARZ

Analog Devices · FET Input Amplifiers · SOIC-8

AD8510ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null terminal for trimming VOS; the excerpt gives no null-network values.
2 -IN input Inverting input with an input voltage range of −2.0 V to +2.5 V at VS = ±5 V (Table 1).
3 +IN input Noninverting input with an input voltage range of −2.0 V to +2.5 V at VS = ±5 V (Table 1).
4 V- power_in Negative supply rail; the part supports dual-supply operation from ±5 V to ±15 V.
5 NULL passive Offset null terminal for trimming VOS; the excerpt gives no null-network values.
6 OUT output Amplifier output with a current capability of ±40 mA minimum and ±54 mA typical at VS = ±5 V (Table 1).
7 V+ power_in Positive supply rail; the part supports dual-supply operation from ±5 V to ±15 V.
8 NC unconnected No connect; the datasheet marks this pin NC = no connect.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage (A Grade), VS = ±5 V VOS 0.1 0.9 mV 4
Offset Voltage (A Grade), VS = ±5 V, over temperature VOS 1.8 mV −40°C < TA < +125°C 4
Input Bias Current, VS = ±5 V IB 21 75 pA 4
Input Bias Current, VS = ±5 V, over temperature IB 0.7 nA −40°C < TA < +85°C 4
Input Bias Current, VS = ±5 V, over temperature IB 7.5 nA −40°C < TA < +125°C 4
Input Offset Current, VS = ±5 V IOS 5 50 pA 4
Input Offset Current, VS = ±5 V, over temperature IOS 0.3 nA −40°C < TA < +85°C 4
Input Offset Current, VS = ±5 V, over temperature IOS 0.5 nA −40°C < TA < +125°C 4
Input Voltage Range, VS = ±5 V -2 2.5 V 4
Common-Mode Rejection Ratio, VS = ±5 V CMRR 86 100 dB VCM = −2.0 V to +2.5 V 4
Large-Signal Voltage Gain, VS = ±5 V AVO 65 107 V/mV RL = 2 kΩ, VO = −3 V to +3 V 4
Offset Voltage Drift (A Grade), VS = ±5 V ΔVOS/ΔT 1.7 12 μV/°C 4
Power Supply Rejection Ratio, VS = ±5 V PSRR 86 130 dB VS = ±4.5 V to ±18 V 4
Supply Current/Amplifier, VS = ±5 V ISY 2 2.3 mA VO = 0 V 4
Supply Current/Amplifier (AD8510/AD8512 range), VS = ±5 V ISY 2.5 mA −40°C < TA < +125°C 4
Voltage Noise Density, VS = ±5 V en 8 10 nV/√Hz f = 1 kHz 4
Peak-to-Peak Voltage Noise, VS = ±5 V en p-p 2.4 5.2 μV p-p 0.1 Hz to 10 Hz bandwidth 4
Offset Voltage (A Grade), VS = ±15 V VOS 0.1 1 mV 5
Offset Voltage (A Grade), VS = ±15 V, over temperature VOS 1.8 mV −40°C < TA < +125°C 5
Input Bias Current, VS = ±15 V IB 25 80 pA 5
Input Bias Current, VS = ±15 V, over temperature IB 0.7 nA −40°C < TA < +85°C 5
Input Bias Current, VS = ±15 V, over temperature IB 10 nA −40°C < TA < +125°C 5
Input Offset Current, VS = ±15 V IOS 6 75 pA 5
Input Offset Current, VS = ±15 V, over temperature IOS 0.3 nA −40°C < TA < +85°C 5
Input Offset Current, VS = ±15 V, over temperature IOS 0.5 nA −40°C < TA < +125°C 5
Input Voltage Range, VS = ±15 V -13.5 13 V 5
Common-Mode Rejection Ratio, VS = ±15 V CMRR 86 108 dB VCM = −12.5 V to +12.5 V 5
Large-Signal Voltage Gain, VS = ±15 V AVO 115 196 V/mV RL = 2 kΩ, VCM = 0 V, VO = −13.5 V to +13.5 V 5
Offset Voltage Drift (A Grade), VS = ±15 V ΔVOS/ΔT 1.7 12 μV/°C 5
Power Supply Rejection Ratio, VS = ±15 V PSRR 86 dB VS = ±4.5 V to ±18 V 5
Supply Current/Amplifier, VS = ±15 V ISY 2.2 2.5 mA VO = 0 V 5
Supply Current/Amplifier (AD8510/AD8512 range), VS = ±15 V ISY 2.6 mA −40°C < TA < +125°C 5
Voltage Noise Density, VS = ±15 V en 8 10 nV/√Hz f = 1 kHz 6
Peak-to-Peak Voltage Noise, VS = ±15 V en p-p 2.4 5.2 μV p-p 0.1 Hz to 10 Hz bandwidth 6
Supply Voltage (printed ±18 V) -18 18 V 7
Storage Temperature Range -65 150 °C 7
Operating Temperature Range -40 125 °C 7
Junction Temperature Range -65 150 °C 7
Lead Temperature (Soldering) 300 °C 10 sec 7
Thermal Resistance, junction-to-ambient, 8-Lead SOIC_N (R) θJA 120 °C/W Worst case, device soldered in circuit board (footnote 1) 7
Thermal Resistance, junction-to-case, 8-Lead SOIC_N (R) θJC 43 °C/W 7

CAD (KiCad official)

  • Symbol: AD8510ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8510arz-etched.step / ad8510arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8510arz.step / ad8510arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (21 pp, sha256 90b2534524534f22, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF