AD8402ARUZ1-REEL from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AGND	power_in	Analog ground, which must be connected to DGND.
2	B2	passive	Terminal B of RDAC 2.
3	A2	passive	Terminal A of RDAC 2.
4	W2	passive	Wiper of RDAC 2, address 01.
5	DGND	power_in	Digital ground, which must be connected to AGND.
6	SHDN	input	Shutdown input that leaves terminal A open circuit and controls Variable Resistor 1 and Variable Resistor 2.
7	CS	input	Active-low chip select; when CS returns high, the serial input register data is decoded by the address bits and loaded into the target DAC register.
8	SDI	input	Serial data input.
9	CLK	input	Serial clock input, positive edge triggered.
10	RS	input	Active-low reset to midscale that sets the RDAC registers to 80H.
11	VDD	power_in	Positive power supply, specified for operation at both 3 V and 5 V.
12	W1	passive	Wiper of RDAC 1, address 00.
13	A1	passive	Terminal A of RDAC 1.
14	B1	passive	Terminal B of RDAC 1.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-14
Category	Data Converters
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Resistor Differential NL	R-DNL	-5	-1	3	LSB	RWB, VA = no connect	8
Resistor Nonlinearity	R-INL	-4		4	LSB	RWB, VA = no connect; typ ±1.5	8
Nominal Resistance	RAB	0.8	1.2	1.6	kΩ	TA = 25°C, model: AD840XYY1	8
Wiper Resistance	RW		53	100	Ω	VDD = 5V, IW = VDD/RAB	8
Wiper Resistance	RW			200	Ω	VDD = 3V, IW = VDD/RAB	8
Nominal Resistance Match	ΔR/RAB		0.75	2	%	CH 1 to CH 2, VAB = VDD, TA = 25°C	8
Integral Nonlinearity	INL	-6		6	LSB	typ ±2	8
Differential Nonlinearity	DNL	-4	-1.5	2	LSB	VDD = 5 V	8
Differential Nonlinearity	DNL	-5	-2	5	LSB	VDD = 3 V, TA = 25°C	8
Full-Scale Error	VWFSE	-20	-12	0	LSB	Code = FFH	8
Zero-Scale Error	VWZSE	0	6	10	LSB	Code = 00H	8
Resistor Terminal Voltage Range	VA, VB, VW	0			V	upper limit VDD	8
Shutdown Supply Current	IA_SD		0.01	5	μA	VA = VDD, VB = 0 V, SHDN = 0	8
Shutdown Wiper Resistance	RW_SD		50	100	Ω	VA = VDD, VB = 0 V, SHDN = 0, VDD = 5 V	8
Input Logic High	VIH	2.4			V	VDD = 5 V	8
Input Logic Low	VIL			0.8	V	VDD = 5 V	8
Input Logic High	VIH	2.1			V	VDD = 3 V	8
Input Logic Low	VIL			0.6	V	VDD = 3 V	8
Output Logic Low	VOL			0.4	V	IOL = 1.6 mA, VDD = 5 V	8
Input Current	IIL	-1		1	μA	VIN = 0 V or 5 V, VDD = 5 V	8
Power Supply Range	VDD	2.7		5.5	V	VDD range	8
Supply Current (CMOS)	IDD		0.01	5	μA	VIH = VDD or VIL = 0 V	8
Supply Current (TTL)	IDD		0.9	4	mA	VIH = 2.4 V or 0.8 V, VDD = 5.5 V	8
Power Dissipation (CMOS)	PDISS			27.5	μW	VIH = VDD or VIL = 0 V, VDD = 5.5 V	8
Power Supply Sensitivity	PSS		0.0035	0.008	%/%	ΔVDD = 5 V ± 10%	8
Power Supply Sensitivity	PSS		0.05	0.13	%/%	ΔVDD = 3 V ± 10%	8
Input Clock Pulse Width	tCH, tCL	10			ns	Clock level high or low	10
Data Setup Time	tDS	5			ns		10
Data Hold Time	tDH	5			ns		10
CLK to SDO Propagation Delay	tPD	1		25	ns	RL = 1 kΩ to 5 V, CL ≤ 20 pF	10
CS Setup Time	tCSS	10			ns		10
CS High Pulse Width	tCSW	10			ns		10
Reset Pulse Width	tRS	50			ns		10
CLK Fall to CS Rise Hold Time	tCSH	0			ns		10
CS Rise to Clock Rise Setup	tCS1	10			ns		10
VDD to GND	VDD	-0.3		8	V	TA = 25°C	11
VA, VB, VW to GND	VA, VB, VW	0			V	upper limit VDD; TA = 25°C	11
IWB, IWA Pulsed	IWB, IWA	-20		20	mA	Pulsed	11
IWB Continuous	IWB	-5		5	mA	RWB ≤ 1 kΩ, A open	11
IWA Continuous	IWA	-5		5	mA	RWA ≤ 1 kΩ, B open	11
IAB Continuous (1 kΩ)	IAB	-2.1		2.1	mA	RAB = 1 kΩ; VDD = 5 V	11
Digital Input and Output Voltage to GND		0		7	V		11
Operating Temperature Range		-40		125	°C		11
Maximum Junction Temperature	TJ max			150	°C		11
Storage Temperature		-65		150	°C		11
Lead Temperature (Soldering, 10 sec)				300	°C		11
Thermal Resistance TSSOP-14 (RU-14)	θJA		180		°C/W		11
Resistance Tempco	ΔRAB/ΔT		700		ppm/°C	VAB = VDD, wiper = no connect	8
Voltage Divider Temperature Coefficient	ΔVW/ΔT		25		ppm/°C	Code = 80H	8
Capacitance Ax, Bx	CA, CB		75		pF	f = 1 MHz, measured to GND, code = 80H	8
Capacitance Wx	CW		120		pF	f = 1 MHz, measured to GND, code = 80H	8
Input Capacitance	CIL		5		pF		8
Bandwidth −3 dB	BW_1K		5000		kHz	R = 1 kΩ	9
Total Harmonic Distortion	THDW		0.015		%	VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz	9
VW Settling Time	tS		0.5		μs	VA = VDD, VB = 0 V, ±1% error band	9
Resistor Noise Voltage	eNWB		3		nV/√Hz	RWB = 500 Ω, f = 1 kHz, RS = 0	9
Crosstalk	CT		-65		dB	VA = VDD, VB = 0 V	9

CAD (KiCad official)

Symbol: AD8402ARUZ1-REEL
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: ad8402aruz1-reel-etched.step / ad8402aruz1-reel-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8402aruz1-reel.step / ad8402aruz1-reel.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (32 pp, sha256 c51edf50aaea939c, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD8402ARUZ1-REEL

Verified AD8402ARUZ1-REEL

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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