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AD8400ARZ50

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Analog Devices Digital Potentiometers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD8400ARZ50

Analog Devices · Digital Potentiometers · SOIC-8

AD8400ARZ50 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B1 passive Terminal B RDAC: the B end terminal of the variable resistor, with the wiper tapping the fixed A-to-B resistance.
2 GND power_in Ground.
3 CS input Active-low chip select input; when CS returns high, data in the serial input register is decoded based on the address bits and loaded into the target DAC register.
4 SDI input Serial data input.
5 CLK input Serial clock input, positive edge triggered.
6 VDD power_in Positive power supply, specified for operation at both 3 V and 5 V.
7 W1 passive Wiper of RDAC, Addr = 002.
8 A1 passive Terminal A RDAC: the A end terminal of the variable resistor, with the wiper tapping the fixed A-to-B resistance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal Resistance (end-to-end) RAB 35 50 65 kΩ TA = 25°C, Model: AD840XYY50 6
Resistor Differential Nonlinearity (rheostat) R-DNL -1 1 LSB RWB, VA = No Connect; typ printed as ±1/4 6
Resistor Nonlinearity (rheostat) R-INL -2 2 LSB RWB, VA = No Connect; typ printed as ±1/2 6
Wiper Resistance RW 50 100 Ω VDD = 5V, IW = VDD/RAB 6
Wiper Resistance RW 200 Ω VDD = 3V, IW = VDD/RAB 6
Nominal Resistance Match ΔR/RAB 0.2 1 % CH 1 to CH 2, CH 3, or CH 4, VAB = VDD, TA = 25°C 6
Integral Nonlinearity INL -4 4 LSB 6
Differential Nonlinearity DNL -1 1 LSB VDD = 5 V 6
Differential Nonlinearity DNL -1.5 1.5 LSB VDD = 3 V, TA = −40°C to +85°C 6
Full-Scale Error VWFSE -1 -0.25 0 LSB Code = FFH 6
Zero-Scale Error VWZSE 0 0.1 1 LSB Code = 00H 6
Voltage Range VA, VB, VW 0 V max printed as VDD 6
Shutdown Current IA_SD 0.01 5 μA VA = VDD, VB = 0 V, SHDN = 0 6
Shutdown Wiper Resistance RW_SD 100 200 Ω VA = VDD, VB = 0 V, SHDN = 0, VDD = 5 V 6
Input Logic High VIH 2.4 V VDD = 5 V 6
Input Logic Low VIL 0.8 V VDD = 5 V 6
Input Logic High VIH 2.1 V VDD = 3 V 6
Input Logic Low VIL 0.6 V VDD = 3 V 6
Output Logic Low VOL 0.4 V IOL = 1.6 mA, VDD = 5 V 6
Input Current IIL -1 1 μA VIN = 0 V or 5 V, VDD = 5 V 6
Power Supply Range VDD 2.7 5.5 V VDD range 6
Supply Current (CMOS) IDD 0.01 5 μA VIH = VDD or VIL = 0 V 6
Supply Current (TTL) IDD 0.9 4 mA VIH = 2.4 V or 0.8 V, VDD = 5.5 V 6
Power Supply Sensitivity PSS 0.0002 0.001 %/% VDD = 5 V ± 10% 6
Power Supply Sensitivity PSS 0.006 0.03 %/% VDD = 3 V ± 10% 6
CLK to SDO Propagation Delay tPD 1 25 ns RL = 1 kΩ to 5 V, CL ≤ 20 pF 10
Input Clock Pulse Width tCH, tCL 10 ns Clock level high or low 10
Data Setup Time tDS 5 ns 10
Data Hold Time tDH 5 ns 10
CS Setup Time tCSS 10 ns 10
CS High Pulse Width tCSW 10 ns 10
Reset Pulse Width tRS 50 ns 10
CLK Fall to CS Rise Hold Time tCSH 0 ns 10
CS Rise to Clock Rise Setup tCS1 10 ns 10
VDD to GND VDD -0.3 8 V TA = 25°C 11
VA, VB, VW to GND VA, VB, VW 0 V max printed as VDD 11
Maximum Current, pulsed IWB, IWA -20 20 mA Pulsed 11
Maximum Current, continuous IWB -5 5 mA RWB ≤ 1 kΩ, A Open 11
Maximum Current, continuous IAB -540 540 μA RAB = 50 kΩ column of 1 kΩ/10 kΩ/50 kΩ/100 kΩ list 11
Digital Input and Output Voltage 0 7 V to GND 11
Operating Temperature Range TA -40 125 °C 11
Maximum Junction Temperature TJ max 150 °C 11
Storage Temperature -65 150 °C 11
Lead Temperature (Soldering) 300 °C 10 sec 11
Thermal Resistance SOIC (R-8) θJA 158 °C/W SOIC (R-8) 11
Device-to-device RAB variation (text) -20 20 % Process lot dependent; stated in text, not in a table 21
Resistance Tempco ΔRAB/ΔT 500 ppm/°C VAB = VDD, wiper = no connect 6
Voltage Divider Tempco ΔVW/ΔT 15 ppm/°C Code = 80H 6
Capacitance Ax, Bx CA, CB 15 pF f = 1 MHz, measured to GND, code = 80H 6
Capacitance Wx CW 80 pF f = 1 MHz, measured to GND, code = 80H 6
Input Capacitance CIL 5 pF 6
Bandwidth −3 dB BW_50K 125 kHz R = 50 kΩ 7
Total Harmonic Distortion THDW 0.003 % VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz 7
VW Settling Time tS_50K 9 μs VA = VDD, VB = 0 V, ±1% error band 7
Resistor Noise Voltage eNWB_50K 20 nV/√Hz RWB = 25 kΩ, f = 1 kHz, RS = 0 7
Crosstalk CT -65 dB VA = VDD, VB = 0 V 7

CAD (KiCad official)

  • Symbol: AD8400ARZ50
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8400arz50-etched.step / ad8400arz50-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8400arz50.step / ad8400arz50.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (32 pp, sha256 c51edf50aaea939c, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF