AD8370AREZ-RL7 from Analog Devices, in a TSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	INHI	input	Balanced differential input, internally biased.
2	ICOM	power_in	Input common; connect to a low impedance ground, and this node is also connected to the exposed pad on the bottom of the device.
3	VCCI	power_in	Input positive supply, 3.0 V to 5.5 V, should be properly bypassed.
4	PWUP	input	Power enable pin; the device is operational when PWUP is pulled high.
5	VOCM	output	Common-mode output voltage pin delivering the midsupply ((VVCCO - VOCOM)/2) voltage for external bypassing with a capacitor to ground; output only and not to be driven externally.
6	VCCO	power_in	Output positive supply, 3.0 V to 5.5 V, should be properly bypassed.
7	OCOM	power_in	Output common; connect to a low impedance ground.
8	OPHI	output	Balanced differential output, biased to midsupply.
9	OPLO	output	Balanced differential output, biased to midsupply.
10	OCOM	power_in	Output common; connect to a low impedance ground.
11	VCCO	power_in	Output positive supply, 3.0 V to 5.5 V, should be properly bypassed.
12	LTCH	input	Serial data latch pin; data is clocked into the shift register via DATA when LTCH is low and latched on the next high-going edge.
13	CLCK	input	Serial clock input pin.
14	DATA	input	Serial data input pin.
15	ICOM	power_in	Input common; connect to a low impedance ground, and this node is also connected to the exposed pad on the bottom of the device.
16	INLO	input	Balanced differential input, internally biased.
17	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-16-EP
Category	Amplifiers
Pins	17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage		3.02		5.5	V		4
Quiescent Current		72.5	79	85.5	mA	PWUP High, GC = LG127, RL = ∞, 4 seconds after power-on, thermal connection made to exposed paddle under device	4
Gain Flatness at 10 MHz		-0.01		0.01	dB	Within ±10 MHz of 10 MHz	3
Gain Flatness at 70 MHz		-0.02		0.02	dB	Within ±10 MHz of 70 MHz	3
Gain Flatness at 140 MHz		-0.03		0.03	dB	Within ±10 MHz of 140 MHz	4
Gain Flatness at 190 MHz		-0.03		0.03	dB	Within ±10 MHz of 240 MHz	4
Gain Flatness at 240 MHz		-0.04		0.04	dB	Within ±10 MHz of 240 MHz	4
Gain Flatness at 380 MHz		-0.04		0.04	dB	Within ±10 MHz of 240 MHz	4
Output Differential Offset		-60		60	mV	VINHI = VINLO, over all gain codes	3
Supply Voltage	VS			5.5	V		5
Differential Input Voltage	VINHI, VINLO			2	V		5
Internal Power Dissipation				575	mW		5
Operating Temperature Range		-40		85	°C		5
Storage Temperature Range		-65		150	°C		5
Maximum Junction Temperature				150	°C		5
Lead Temperature Range				235	°C	Soldering 60 sec	5
Thermal Resistance θJA	θJA			30	°C/W	Exposed paddle soldered down	5
Thermal Resistance θJA	θJA			95	°C/W	Exposed paddle not soldered down	5
Thermal Resistance θJC	θJC			9	°C/W	At exposed paddle	5

CAD (KiCad official)

Symbol: AD8370AREZ-RL7
Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
3D model: TSSOP-16-EP (KiCad packages3D, STEP)
3D model files: ad8370arez-rl7-etched.step / ad8370arez-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8370arez-rl7.step / ad8370arez-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (28 pp, sha256 6fb0817d04252131, retrieved 2026-11-09, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD8370AREZ-RL7

Verified AD8370AREZ-RL7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README