main
Ray Set visibility: public b5c919f 2d ago
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{
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  "slug": "ad8330acpz-r7",
  "title": "AD8330ACPZ-R7",
  "brief": "ADI(亚德诺) , LFCSP-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
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    "mpn": "AD8330ACPZ-R7",
    "manufacturer": "ADI(亚德诺)",
    "package": "LFCSP-16(3x3)",
    "pin_count": 17,
    "category": "IC",
    "subcategory": "IC",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD8330.pdf",
    "parts": {
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      "model_3d_plain": "ad8330acpz-r7-etched.glb",
      "model_3d_step": "ad8330acpz-r7-etched.step",
      "model_3d_step_plain": "ad8330acpz-r7.step",
      "lbr": "ad8330acpz-r7.lbr"
    },
    "distributor_links": {
      "lcsc": "C470824",
      "digikey": "AD8330ACPZ-R7TR-ND",
      "mouser": "584-AD8330ACPZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T16:36:41Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "AD8330ACPZ-R7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD8330ACPZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VPSI",
        "type": "power_in",
        "description": "Positive supply for the input stages."
      },
      {
        "number": "2",
        "name": "INHI",
        "type": "input",
        "description": "Differential signal input, positive polarity; the input is rated up to ±2 V peak differential with 1 kΩ differential input resistance."
      },
      {
        "number": "3",
        "name": "INLO",
        "type": "input",
        "description": "Differential signal input, negative polarity; the input is rated up to ±2 V peak differential with 1 kΩ differential input resistance."
      },
      {
        "number": "4",
        "name": "MODE",
        "type": "input",
        "description": "Logic input that selects the gain slope; high means gain increases with VDBS, and the logic levels are 1.5 V minimum for mode up and 0.5 V maximum for mode down."
      },
      {
        "number": "5",
        "name": "VDBS",
        "type": "input",
        "description": "Input for the linear-in-dB gain control voltage, giving 0 dB to 50 dB gain for 0 V to 1.5 V at 30 mV/dB."
      },
      {
        "number": "6",
        "name": "CMGN",
        "type": "passive",
        "description": "Common baseline for the gain control interfaces, connected to COMM for the normal 0 V to 1.5 V VDBS range."
      },
      {
        "number": "7",
        "name": "COMM",
        "type": "power_in",
        "description": "Ground for the input and gain control bias circuitry."
      },
      {
        "number": "8",
        "name": "VMAG",
        "type": "input",
        "description": "Input for gain/amplitude control; it internally defaults to 0.5 V and sets a linear numeric gain factor from 0.03 to 10."
      },
      {
        "number": "9",
        "name": "CMOP",
        "type": "power_in",
        "description": "Ground for the output stages."
      },
      {
        "number": "10",
        "name": "OPLO",
        "type": "output",
        "description": "Differential signal output, negative polarity, which can drive single-sided loads essentially rail-to-rail."
      },
      {
        "number": "11",
        "name": "OPHI",
        "type": "output",
        "description": "Differential signal output, positive polarity, which can drive single-sided loads essentially rail-to-rail."
      },
      {
        "number": "12",
        "name": "VPSO",
        "type": "power_in",
        "description": "Positive supply for the output stages."
      },
      {
        "number": "13",
        "name": "CNTR",
        "type": "input",
        "description": "Common-mode output voltage control; it can be driven to within 0.5 V of either ground or VS, and defaults to VS/2 when open."
      },
      {
        "number": "14",
        "name": "VPOS",
        "type": "power_in",
        "description": "Positive supply for the inner stages."
      },
      {
        "number": "15",
        "name": "OFST",
        "type": "passive",
        "description": "Internal offset compensation feature; the external capacitor sets the high-pass corner (as low as 5 Hz), the feature is enabled when unconnected, and disabled when grounded."
      },
      {
        "number": "16",
        "name": "ENBL",
        "type": "input",
        "description": "Power enable, active high."
      },
      {
        "number": "17",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
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          "extractor flagged: Pin 16 is printed as ENB in the Figure 2 pin diagram but as ENBL in Table 3; the table name ENBL is "
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        "at": "2026-11-02T16:36:29"
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      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD8330.pdf",
        "pages": 32,
        "sha256": "1f0f9ebcbdcc9778",
        "source_tier": "mfr"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 17,
        "described": 17,
        "cites_pages": true,
        "refuses_to_fabricate": true
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  "metadata": {
    "specs": {
      "Manufacturer": "ADI(亚德诺)",
      "Package": "LFCSP-16(3x3)",
      "Category": "",
      "Pins": "17"
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          "name": "Peak Output Scaling, Gain vs. VMAG",
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        {
          "name": "Gain Linearity Error",
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  "author": {
    "name": "Ray",
    "email": "[email protected]"
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