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AD8306ARZ

Analog Devices · Special Purpose Amplifiers · SOIC-16

AD8306ARZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COM2 power_in Special common pin for the RSSI output.
2 VPS1 power_in Supply pin for the first five amplifier stages and the main biasing system; supply range is +2.7 V to +6.5 V.
3 PADL power_in Tie-down to the paddle on which the IC is mounted; grounded.
4 INHI input Signal input, HI or plus polarity; fully differential input with 1 kΩ input resistance and 2.5 pF input capacitance.
5 INLO input Signal input, LO or minus polarity; fully differential input with 1 kΩ input resistance and 2.5 pF input capacitance.
6 PADL power_in Tie-down to the paddle on which the IC is mounted; grounded.
7 COM1 power_in Main common connection.
8 ENBL input Chip enable, active when HI; the device is disabled at or below 1 V and fully enabled at or above 2.7 V with VS.
9 LMDR passive Limiter drive programming pin; resistor RLIM from this pin to ground sets the limiter output current, with a nominal bias of about 400 mV.
10 FLTR passive RSSI bandwidth-reduction pin; a capacitor between FLTR and VLOG lowers the RSSI corner frequency.
11 PADL power_in Tie-down to the paddle on which the IC is mounted; grounded.
12 LMLO output Limiter output, LO or minus polarity; open-collector output that may swing to 1.2 V below VPS2.
13 LMHI output Limiter output, HI or plus polarity; open-collector output that may swing to 1.2 V below VPS2.
14 PADL power_in Tie-down to the paddle on which the IC is mounted; grounded.
15 VPS2 power_in Supply pin for the sixth gain stage, limiter and RSSI output stage load current; supply range is +2.7 V to +6.5 V.
16 VLOG output Logarithmic (RSSI) output, nominally scaled 20 mV/dB.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Amplifiers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Resistance RIN 800 1000 1200 Ω From INHI to INLO 2
Usable Frequency Range 5 400 MHz 2
Phase Variation at 100 MHz -2 2 Degrees Over Input Range -73 dBV to -3 dBV 2
Limiter Output Current 0 1 10 mA Nominally 400 mV/RLIM 2
Limiter Output Current Versus Temperature -0.008 %/°C -40°C ≤ TA ≤ +85°C 2
Input Range -78 9 dBV 2
Maximum Output Voltage 1.25 V At either LMHI or LMLO, wrt VPS2 2
Limiter Rise/Fall Time (10%-90%) 0.6 ns RLOAD = 50 Ω, 40 Ω ≤ RLIM ≤ 400 Ω 2
Dynamic Range (±3 dB Error) 100 dB From Noise Floor to Maximum Input 2
Transfer Slope 19.5 20 20.5 mV/dB f = 10 MHz 2
Transfer Slope 19.6 mV/dB f = 100 MHz 2
Transfer Slope Over Temperature 19.3 20 20.7 mV/dB Over Temperature -40°C < TA < +85°C 2
Intercept (Log Offset) -109.5 -108 -106.5 dBV f = 10 MHz 2
Intercept (Log Offset) -108.4 dBV f = 100 MHz 2
Intercept Over Temperature -111 -108 -105 dBV Over Temperature -40°C ≤ TA ≤ +85°C 2
Temperature Sensitivity -0.009 dB/°C 2
Linearity Error (Ripple) -0.4 0.4 dB Input from -80 dBV to +0 dBV 2
Output Voltage VLOG 0.34 V Input = -91 dBV, VS = +5 V, +2.7 V 2
Output Voltage VLOG 2.34 V Input = +9 dBV, VS = +5 V 2
Output Voltage VLOG 2.1 V Input = -3 dBV, VS = +3 V 2
Minimum Load Resistance RL 40 50 Ω 2
Maximum Sink Current 0.75 1 1.25 mA To Ground 2
Output Resistance 0.3 Ω 2
Small-Signal Bandwidth 3.5 MHz 2
Output Settling Time to 2% 120 220 ns Large Scale Input, +3 dBV, RL ≥ 50 Ω, CL ≤ 100 pF 2
Rise/Fall Time (10%-90%) 73 100 ns Large Scale Input, +3 dBV, RL ≥ 50 Ω, CL ≤ 100 pF 2
Supply Voltage VS 2.7 5 6.5 V 2
Quiescent Current 13 16 20 mA Zero-Signal, LMDR Open 2
Quiescent Current Over Temperature 11 16 23 mA -40°C < TA < +85°C 2
Disable Current 0.01 4 µA -40°C < TA < +85°C 2
Additional Bias for Limiter 2 2.25 mA RLIM = 400 Ω (See Text) 2
Logic Level to Enable Power 2.7 V HI Condition, -40°C < TA < +85°C 2
Input Current when HI 40 60 µA 3 V at ENBL, -40°C < TA < +85°C 2
Logic Level to Disable Power -0.5 1 V LO Condition, -40°C < TA < +85°C 2
Supply Voltage VS 7.5 V 3
Input Level, Differential 26 dBm re 50 Ω 3
Input Level, Single-Ended 20 dBm re 50 Ω 3
Internal Power Dissipation 800 mW 3
Thermal Resistance Junction-to-Ambient θJA 125 °C/W 3
Thermal Resistance Junction-to-Case θJC 25 °C/W 3
Maximum Junction Temperature 125 °C 3
Operating Temperature Range -40 85 °C 3
Storage Temperature Range -65 150 °C 3
Lead Temperature Range 300 °C Soldering 60 sec 3

CAD (KiCad official)

  • Symbol: AD8306ARZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: ad8306arz-etched.step / ad8306arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8306arz.step / ad8306arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 3a0af75a56a93aa5, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF