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AD8065ARZ

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Analog Devices FET Input Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD8065ARZ

Analog Devices · FET Input Amplifiers · SOIC-8

AD8065ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave unconnected.
2 -IN input Inverting input of the FET-input amplifier; keep input-to-ground and input-to-trace parasitic capacitance low and limit overdrive current to 30 mA with a series resistor when the differential voltage exceeds 0.7 V or the input exceeds the supply rails.
3 +IN input Non-inverting input of the FET-input amplifier with a common-mode range of -5.0 V to +2.4 V typical at ±5 V supplies.
4 -VS power_in Negative power supply; total supply span is 5 V to 24 V, with an absolute maximum supply of 26.4 V.
5 NC unconnected No internal connection; leave unconnected.
6 VOUT output Output of the rail-to-rail output stage, which swings to within 0.5 V of either supply and sources or sinks up to 30 mA.
7 +VS power_in Positive power supply; total supply span is 5 V to 24 V, with an absolute maximum supply of 26.4 V.
8 NC unconnected No internal connection; leave unconnected.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Slew rate 130 180 V/µs VS = ±5 V; G = +2, VO = 4 V step 4
Input offset voltage 0.4 1.5 mV VCM = 0 V, SOIC package; VS = ±5 V 4
Input offset voltage drift 1 17 µV/°C VS = ±5 V 4
Input bias current 2 6 pA SOIC package; VS = ±5 V 4
Input bias current 25 125 pA TMIN to TMAX; VS = ±5 V 4
Input offset current 1 10 pA VS = ±5 V 4
Input offset current 1 125 pA TMIN to TMAX; VS = ±5 V 4
Open-loop gain 100 113 dB VO = ±3 V, RL = 1 kΩ; VS = ±5 V 4
-3 dB bandwidth 100 145 MHz G = +1, VO = 0.2 V p-p (AD8065); VS = ±5 V 4
FET input common-mode voltage range -5 1.7 V VS = ±5 V 4
Common-mode rejection ratio -85 -100 dB VCM = -1 V to +1 V; VS = ±5 V 4
Output voltage swing -4.88 4.9 V RL = 1 kΩ; VS = ±5 V 5
Output voltage swing -4.8 4.7 V RL = 150 Ω; VS = ±5 V 5
Operating supply voltage range 5 24 V 5
Quiescent current per amplifier 6.4 7.2 mA 5
Power supply rejection ratio ±PSRR -85 -100 dB VS = ±5 V 5
-3 dB bandwidth 100 145 MHz G = +1, VO = 0.2 V p-p (AD8065); VS = ±12 V 6
Slew rate 130 180 V/µs VS = ±12 V; G = +2, VO = 4 V step 6
Input offset voltage 0.4 1.5 mV VCM = 0 V, SOIC package; VS = ±12 V 6
Input offset voltage drift 1 17 µV/°C VS = ±12 V 6
Input bias current 3 7 pA SOIC package; VS = ±12 V 6
Input offset current 2 10 pA VS = ±12 V 6
Open-loop gain 103 114 dB VO = ±10 V, RL = 1 kΩ; VS = ±12 V 6
FET input common-mode voltage range -12 8.5 V VS = ±12 V 6
Common-mode rejection ratio -85 -100 dB VCM = -1 V to +1 V; VS = ±12 V 6
Output voltage swing -11.8 11.8 V RL = 1 kΩ; VS = ±12 V 6
Output voltage swing -11.25 11.5 V RL = 350 Ω; VS = ±12 V 6
Quiescent current per amplifier 6.6 7.4 mA 6
Power supply rejection ratio ±PSRR -84 -93 dB VS = ±12 V 6
-3 dB bandwidth 125 155 MHz G = +1, VO = 0.2 V p-p (AD8065); VS = +5 V 7
Slew rate 105 160 V/µs VS = +5 V; G = +2, VO = 2 V step 7
Input offset voltage 0.4 1.5 mV VCM = 1.0 V, SOIC package; VS = +5 V 7
Input offset voltage drift 1 17 µV/°C VS = +5 V 7
Input bias current 1 5 pA SOIC package; VS = +5 V 7
Input bias current 25 125 pA TMIN to TMAX; VS = +5 V 7
Input offset current 1 5 pA VS = +5 V 7
Input offset current 1 125 pA TMIN to TMAX; VS = +5 V 7
Open-loop gain 100 113 dB VO = 1 V to 4 V (AD8065); VS = +5 V 7
FET input common-mode voltage range 0 1.7 V VS = +5 V 7
Common-mode rejection ratio -74 -100 dB VCM = 0.5 V to 1.5 V; VS = +5 V 7
Output voltage swing 0.1 4.85 V RL = 1 kΩ; VS = +5 V 7
Output voltage swing 0.07 4.83 V RL = 150 Ω; VS = +5 V 7
Quiescent current per amplifier 5.8 6.4 7 mA 8
Power supply rejection ratio ±PSRR -78 -100 dB VS = +5 V 8
Supply voltage 26.4 V 9
Differential input voltage 1.8 V 9
Storage temperature range -65 125 °C 9
Operating temperature range -40 85 °C AD8065AR/ARZ (commercial grade) 9
Lead temperature (soldering) 300 °C 10 s soldering 9
Thermal resistance, junction-to-ambient (SOIC-8) θJA 125 °C/W JEDEC standard 4-layer board; approximate value per datasheet 9

CAD (KiCad official)

  • Symbol: AD8065ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8065arz-etched.step / ad8065arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8065arz.step / ad8065arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 365ad0b9b5e03469, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF