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AD8021ARZ-REEL

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Analog Devices Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD8021ARZ-REEL

Analog Devices · Operational Amplifier · SOIC-8

AD8021ARZ-REEL from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LOGIC REFERENCE passive Reference for the DISABLE (pin 8) logic level; connect to the logic low supply, or to ground or logic low if the disable feature is not used.
2 -IN input Inverting input of the amplifier.
3 +IN input Noninverting input of the amplifier.
4 -VS power_in Negative supply voltage; the high-frequency bypass capacitor should sit immediately adjacent to this pin.
5 CCOMP passive Compensation capacitor connection on the high-impedance node; tie to -VS, and the value is chosen per the Applications section, using a high-quality surface-mount COG or NPO ceramic.
6 VOUT output Amplifier output; a guard ring is recommended on pin 5 tied to this pin's potential.
7 +VS power_in Positive supply voltage; the high-frequency bypass capacitor should sit immediately adjacent to this pin.
8 DISABLE input Active-low disable: the part is enabled when this pin is about 2 V or more above LOGIC REFERENCE (pin 1) and disabled when it is within about 1.5 V of pin 1.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
-3 dB Small Signal Bandwidth 355 490 MHz VS=±5 V; G = +1, CC = 10 pF, VO = 0.05 V p-p 3
-3 dB Small Signal Bandwidth 160 205 MHz VS=±5 V; G = +2, CC = 7 pF, VO = 0.05 V p-p 3
-3 dB Small Signal Bandwidth 150 185 MHz VS=±5 V; G = +5, CC = 2 pF, VO = 0.05 V p-p 3
-3 dB Small Signal Bandwidth 110 150 MHz VS=±5 V; G = +10, CC = 0 pF, VO = 0.05 V p-p 3
Slew Rate, 1 V Step 95 120 V/μs VS=±5 V; G = +1, CC = 10 pF 3
Slew Rate, 1 V Step 120 150 V/μs VS=±5 V; G = +2, CC = 7 pF 3
Slew Rate, 1 V Step 250 300 V/μs VS=±5 V; G = +5, CC = 2 pF 3
Slew Rate, 1 V Step 380 420 V/μs VS=±5 V; G = +10, CC = 0 pF 3
Settling Time to 0.01% 23 ns VS=±5 V; VO = 1 V step, RL = 500 Ω 3
Overload Recovery (50%) 50 ns VS=±5 V; ±2.5 V input step, G = +2 3
HD2 at 1 MHz HD2 -93 dBc VS=±5 V; f = 1 MHz, VO = 2 V p-p 3
HD3 at 1 MHz HD3 -108 dBc VS=±5 V; f = 1 MHz, VO = 2 V p-p 3
HD2 at 5 MHz HD2 -70 dBc VS=±5 V; f = 5 MHz, VO = 2 V p-p 3
HD3 at 5 MHz HD3 -80 dBc VS=±5 V; f = 5 MHz, VO = 2 V p-p 3
Input Voltage Noise en 2.1 2.6 nV/√Hz VS=±5 V; f = 50 kHz 3
Input Current Noise in 2.1 pA/√Hz VS=±5 V; f = 50 kHz 3
Differential Gain Error 0.03 % VS=±5 V; NTSC, RL = 150 Ω 3
Differential Phase Error 0.04 Degrees VS=±5 V; NTSC, RL = 150 Ω 3
Input Offset Voltage VOS 0.4 1 mV VS=±5 V 3
Input Offset Voltage Drift 0.5 μV/°C VS=±5 V; TMIN to TMAX 3
Input Bias Current IB 7.5 10.5 μA VS=±5 V; +Input or −Input 3
Input Bias Current Drift 10 nA/°C VS=±5 V 3
Input Offset Current IOS 0.1 0.5 μA VS=±5 V 3
Open-Loop Gain AVO 82 86 dB VS=±5 V 3
Input Resistance RIN 10 MΩ VS=±5 V 3
Common-Mode Input Capacitance CIN 1 pF VS=±5 V 3
Input Common-Mode Voltage Range VCM -4.1 4.6 V VS=±5 V 3
Common-Mode Rejection Ratio CMRR -86 -98 dB VS=±5 V; VCM = ±4 V 3
Linear Output Current 60 mA VS=±5 V 3
Short-Circuit Current ISC 75 mA VS=±5 V 3
Off Isolation -40 dB VS=±5 V; f = 10 MHz 3
Turn-On Time 45 ns VS=±5 V; VO = 0 V to 2 V, 50% logic to 50% output 3
Turn-Off Time 50 ns VS=±5 V; VO = 0 V to 2 V, 50% logic to 50% output 3
DISABLE Voltage, Off VDISABLE − VLOGIC REFERENCE 1.75 V VS=±5 V; printed as off/on pair, this is the off value 3
DISABLE Voltage, On VDISABLE − VLOGIC REFERENCE 1.9 V VS=±5 V; printed as off/on pair, this is the on value 3
Enabled Leakage Current 70 μA VS=±5 V; LOGIC REFERENCE = 0.4 V 3
Enabled Leakage Current 2 μA VS=±5 V; DISABLE = 4.0 V 3
Disabled Leakage Current 30 μA VS=±5 V; LOGIC REFERENCE = 0.4 V 4
Disabled Leakage Current 33 μA VS=±5 V; DISABLE = 0.4 V 4
Operating Range VS 2.25 5 12 V Supply voltage, single or dual supply 4
Quiescent Current, output enabled IS 7 7.7 mA VS=±5 V; output enabled 4
Quiescent Current, output disabled IS 1.3 1.6 mA VS=±5 V; output disabled 4
+Power Supply Rejection Ratio +PSRR -86 -95 dB VS=±5 V; VCC = 4 V to 6 V, VEE = −5 V 4
−Power Supply Rejection Ratio −PSRR -86 -95 dB VS=±5 V; VCC = 5 V, VEE = −6 V to −4 V 4
Supply Voltage VS 26.4 V 7
Differential Input Voltage VID -0.8 0.8 V Inputs protected by diodes; above ±0.8 V limit input current to ±10 mA 7
Differential Input Current -10 10 mA 7
Storage Temperature Range -65 125 °C 7
Operating Temperature Range -40 85 °C 7
Lead Temperature (Soldering) 300 °C 10 sec 7
Thermal Resistance, junction-to-ambient (8-lead SOIC) θJA 125 °C/W Device in free air, 8-lead SOIC 7

CAD (KiCad official)

  • Symbol: AD8021ARZ-REEL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad8021arz-reel-etched.step / ad8021arz-reel-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8021arz-reel.step / ad8021arz-reel.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 2acf21aa45058a5c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF