AD7997BRUZ-1 from Analog Devices, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AGND	power_in	Analog ground reference point for all circuitry on the device; all analog input signals should be referred to this AGND voltage.
2	VDD	power_in	Power supply input; the VDD range is 2.7 V to 5.5 V.
3	AGND	power_in	Analog ground reference point for all circuitry on the device; all analog input signals should be referred to this AGND voltage.
4	AGND	power_in	Analog ground reference point for all circuitry on the device; all analog input signals should be referred to this AGND voltage.
5	VDD	power_in	Power supply input; the VDD range is 2.7 V to 5.5 V.
6	REFIN	input	External voltage reference input with range 1.2 V to VDD; 0.1 µF and 1 µF capacitors should be placed between REFIN and AGND.
7	VIN1	input	Single-ended analog input channel 1 with input range 0 V to REFIN.
8	VIN3	input	Single-ended analog input channel 3 with input range 0 V to REFIN.
9	VIN5	input	Single-ended analog input channel 5 with input range 0 V to REFIN.
10	VIN7	input	Single-ended analog input channel 7 with input range 0 V to REFIN.
11	VIN8	input	Single-ended analog input channel 8 with input range 0 V to REFIN.
12	VIN6	input	Single-ended analog input channel 6 with input range 0 V to REFIN.
13	VIN4	input	Single-ended analog input channel 4 with input range 0 V to REFIN.
14	VIN2	input	Single-ended analog input channel 2 with input range 0 V to REFIN.
15	AS	input	Address select logic input that selects one of three I2C addresses depending on the voltage applied (AGND, VDD, or float).
16	CONVST	input	Edge-triggered convert start input; the rising edge powers up the part (power-up time 1 µs) and the falling edge starts a conversion.
17	ALERT/BUSY	output	Open-drain digital output selectable as ALERT (out-of-range indicator) or BUSY (active while a conversion is in progress).
18	SDA	bidirectional	Serial bus bidirectional data line; open-drain output with an external pull-up resistor required.
19	SCL	input	Serial bus clock input; open-drain with an external pull-up resistor required.
20	AGND	power_in	Analog ground reference point for all circuitry on the device; all analog input signals should be referred to this AGND voltage.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-20
Category	Data Converters
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Signal to Noise + Distortion (SINAD)	SINAD	61			dB	FIN = 10 kHz for fSCL 1.7 to 3.4 MHz; FIN = 1 kHz for fSCL up to 400 kHz	3
Total Harmonic Distortion (THD)	THD			-75	dB	FIN = 10 kHz for fSCL 1.7 to 3.4 MHz; FIN = 1 kHz for fSCL up to 400 kHz	3
Peak Harmonic or Spurious Noise (SFDR)	SFDR			-76	dB	FIN = 10 kHz for fSCL 1.7 to 3.4 MHz; FIN = 1 kHz for fSCL up to 400 kHz	3
Aperture Delay				10	ns		3
Integral Nonlinearity	INL	-0.5		0.5	LSB		3
Differential Nonlinearity	DNL	-0.5		0.5	LSB	Guaranteed no missed codes to 10 bits	3
Offset Error		-1.5		1.5	LSB	Mode 1 (CONVST Mode)	3
Offset Error		-2.5		2.5	LSB	Mode 2 (Command Mode)	3
Offset Error Match		-0.5		0.5	LSB		3
Gain Error		-1.5		1.5	LSB		3
Gain Error Match		-0.5		0.5	LSB		3
DC Leakage Current (analog input)		-1		1	µA		3
REFIN Input Voltage Range		1.2			V	Range 1.2 V to VDD; maximum is VDD, not numeric	3
DC Leakage Current (REFIN)		-1		1	µA		3
Input Leakage Current (SDA, SCL)	IIN	-1		1	µA	VIN = 0 V or VDD	3
Input Capacitance (SDA, SCL)	CIN			10	pF		3
t10 Fall time of SDA signal	t10			300	ns	Standard mode	8
t10 Fall time of SDA signal	t10	10		80	ns	High speed mode, CB = 100 pF max	8
t10 Fall time of SDA signal	t10	20		160	ns	High speed mode, CB = 400 pF max	8
t11 Rise time of SCL signal	t11			1000	ns	Standard mode	8
t11 Rise time of SCL signal	t11			300	ns	Fast mode; min printed as 20 + 0.1 CB, not numeric	8
t11 Rise time of SCL signal	t11	10		40	ns	High speed mode, CB = 100 pF max	8
t11 Rise time of SCL signal	t11	20		80	ns	High speed mode, CB = 400 pF max	8
t11A Rise time of SCL after repeated start and after ACK bit	t11A			1000	ns	Standard mode	8
t11A Rise time of SCL after repeated start and after ACK bit	t11A			300	ns	Fast mode; min printed as 20 + 0.1 CB, not numeric	8
t11A Rise time of SCL after repeated start and after ACK bit	t11A	10		80	ns	High speed mode, CB = 100 pF max	8
t11A Rise time of SCL after repeated start and after ACK bit	t11A	20		160	ns	High speed mode, CB = 400 pF max	8
t12 Fall time of SCL signal	t12			300	ns	Standard mode	8
t12 Fall time of SCL signal	t12	10		40	ns	High speed mode, CB = 100 pF max	8
t12 Fall time of SCL signal	t12	20		80	ns	High speed mode, CB = 400 pF max	8
Pulse width of suppressed spike	tSP	0		50	ns	Fast mode	8
Pulse width of suppressed spike	tSP	0		10	ns	High speed mode	8
VDD to GND	VDD	-0.3		7	V		9
Analog Input Voltage to GND		-0.3			V	Maximum printed as VDD + 0.3 V, not numeric	9
Reference Input Voltage to GND		-0.3			V	Maximum printed as VDD + 0.3 V, not numeric	9
Digital Input Voltage to GND		-0.3		7	V		9
Digital Output Voltage to GND		-0.3			V	Maximum printed as VDD + 0.3 V, not numeric	9
Input Current to Any Pin Except Supplies		-10		10	mA		9
Operating Temperature Range (Commercial, B Version)		-40		85	°C		9
Storage Temperature Range		-65		150	°C		9
Junction Temperature				150	°C		9
ESD				1.5	kV		9
Thermal Impedance θJA	θJA		143		°C/W	20-Lead TSSOP	9
Thermal Impedance θJC	θJC		45		°C/W	20-Lead TSSOP	9
Intermodulation Distortion, second-order terms			-86		dB	fa = 10.1 kHz, fb = 9.9 kHz for fSCL 1.7 to 3.4 MHz; fa = 1.1 kHz, fb = 0.9 kHz for fSCL up to 400 kHz	3
Intermodulation Distortion, third-order terms			-86		dB	fa = 10.1 kHz, fb = 9.9 kHz for fSCL 1.7 to 3.4 MHz; fa = 1.1 kHz, fb = 0.9 kHz for fSCL up to 400 kHz	3
Aperture Jitter			50		ps		3
Channel-to-Channel Isolation			-90		dB	FIN = 108 Hz	3
Full-Power Bandwidth			11		MHz	@ 3 dB	3
Full-Power Bandwidth			2		MHz	@ 0.1 dB	3
Input Capacitance (analog input)			30		pF		3
Input Impedance (REFIN)			69		kΩ	During a conversion	3
Power-up time	tPOWER-UP		1		µs		8

CAD (KiCad official)

Symbol: AD7997BRUZ-1
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model files: ad7997bruz-1-etched.step / ad7997bruz-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7997bruz-1.step / ad7997bruz-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (32 pp, sha256 081ef00889049a99, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD7997BRUZ-1

Verified AD7997BRUZ-1

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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