component
AD7992BRMZ-1
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AD7992BRMZ-1
Analog Devices · Analog To Digital Converters (ADCs) · MSOP-10
AD7992BRMZ-1 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONVST | input | Edge-triggered convert start input whose rising edge powers up the part (1 µs power-up time, so the high pulse must be at least 1 µs) and whose falling edge puts the track-and-hold into hold mode and starts a conversion. |
| 2 | AGND | power_in | Analog ground reference for all circuitry on the AD7992, to which all analog input signals should be referred. |
| 3 | VDD | power_in | Power supply input with a VDD range of 2.7 V to 5.5 V. |
| 4 | VIN2/REFIN | input | Analog input 2 in dual-channel mode (D6 = 0, reference from VDD) or external reference input in single-channel mode (D6 = 1) with a 1.2 V to VDD range, which should have 0.1 µF and 1 µF capacitors to AGND. |
| 5 | VIN1 | input | Analog input 1, a single-ended analog input channel with an input range of 0 V to REFIN. |
| 6 | AS | input | Logic input address select that selects one of three I2C addresses (GND, VDD or floating, per Table 6); floating gives address 010 0000. |
| 7 | AGND | power_in | Analog ground reference for all circuitry on the AD7992, to which all analog input signals should be referred. |
| 8 | ALERT/BUSY | output | Open-drain digital output, selectable as an out-of-range ALERT or a conversion-in-progress BUSY indicator, which requires an external pull-up resistor. |
| 9 | SDA | bidirectional | Open-drain serial bus bidirectional data I/O that requires an external pull-up resistor. |
| 10 | SCL | input | Serial bus clock digital input, described in the pin table as requiring an external pull-up resistor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Data Converters |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Signal-to-Noise + Distortion | SINAD | 70.5 | dB | FIN = 10 kHz for fSCL 1.7 to 3.4 MHz | 3 | ||
| Signal-to-Noise Ratio | SNR | 71 | dB | FIN = 10 kHz for fSCL 1.7 to 3.4 MHz | 3 | ||
| Total Harmonic Distortion | THD | -78 | dB | FIN = 10 kHz for fSCL 1.7 to 3.4 MHz | 3 | ||
| Peak Harmonic or Spurious Noise | SFDR | -79 | dB | FIN = 10 kHz for fSCL 1.7 to 3.4 MHz | 3 | ||
| Aperture Delay | 10 | ns | 3 | ||||
| Integral Nonlinearity | INL | -1 | 0.2 | 1 | LSB | typ ±0.2 LSB | 3 |
| Differential Nonlinearity | DNL | -0.9 | 0.2 | 1 | LSB | Guaranteed no missed codes to 12 bits; typ ±0.2 | 3 |
| Offset Error Mode 1 | -4 | 4 | LSB | Mode 1 (CONVST mode) | 3 | ||
| Offset Error Mode 2 | -6 | 6 | LSB | Mode 2 (command mode) | 3 | ||
| Offset Error Match | -1 | 1 | LSB | Dual-channel mode | 3 | ||
| Gain Error | -2 | 2 | LSB | 3 | |||
| Gain Error Match | -1 | 1 | LSB | Dual-channel mode | 3 | ||
| Analog Input DC Leakage Current | -1 | 1 | µA | 3 | |||
| REFIN Input Voltage Range | REFIN | 1.2 | V | 1.2 to VDD | 3 | ||
| REFIN DC Leakage Current | -1 | 1 | µA | 3 | |||
| Input High Voltage (SDA, SCL) | VINH | 0.7 | V | 0.7 (VDD) | 3 | ||
| Input Low Voltage (SDA, SCL) | VINL | 0.3 | V | 0.3 (VDD) | 3 | ||
| Input Leakage Current (SDA, SCL) | IIN | -1 | 1 | µA | VIN = 0 V or VDD | 3 | |
| Input Capacitance (SDA, SCL) | CIN | 10 | pF | 3 | |||
| Input Hysteresis (SDA, SCL) | VHYST | 0.1 | V | 0.1 (VDD) | 3 | ||
| Resolution | 12 | Bits | 3 | ||||
| Second-Order IMD | -90 | dB | fa = 10.1 kHz, fb = 9.9 kHz for fSCL 1.7 to 3.4 MHz | 3 | |||
| Third-Order IMD | -90 | dB | fa = 10.1 kHz, fb = 9.9 kHz for fSCL 1.7 to 3.4 MHz | 3 | |||
| Aperture Jitter | 50 | ps | 3 | ||||
| Channel-to-Channel Isolation | -90 | dB | FIN = 108 Hz | 3 | |||
| Full Power Bandwidth @ 3 dB | 11 | MHz | @ 3 dB | 3 | |||
| Full Power Bandwidth @ 0.1 dB | 2 | MHz | @ 0.1 dB | 3 | |||
| Analog Input Capacitance | 30 | pF | 3 | ||||
| REFIN Input Impedance | 69 | kΩ | 3 | ||||
| SDA fall time t10, high speed, CB = 100 pF max | t10 | 10 | 80 | ns | High speed mode, CB = 100 pF max | 6 | |
| SDA fall time t10, high speed, CB = 400 pF max | t10 | 20 | 160 | ns | High speed mode, CB = 400 pF max | 6 | |
| SCL rise time t11, high speed, CB = 100 pF max | t11 | 10 | 40 | ns | High speed mode, CB = 100 pF max | 6 | |
| SCL rise time t11, high speed, CB = 400 pF max | t11 | 20 | 80 | ns | High speed mode, CB = 400 pF max | 6 | |
| SCL fall time t12, high speed, CB = 100 pF max | t12 | 10 | 40 | ns | High speed mode, CB = 100 pF max | 6 | |
| SCL fall time t12, high speed, CB = 400 pF max | t12 | 20 | 80 | ns | High speed mode, CB = 400 pF max | 6 | |
| Suppressed spike pulse width, high speed | tSP | 0 | 10 | ns | High speed mode | 6 | |
| Power-up time | tPOWER-UP | 1 | µs | 6 | |||
| VDD to GND | VDD | -0.3 | 7 | V | TA = 25°C | 7 | |
| Reference Input Voltage to GND | -0.3 | V | upper limit VDD + 0.3 V | 7 | |||
| Digital Input Voltage to GND | -0.3 | 7 | V | 7 | |||
| Digital Output Voltage to GND | -0.3 | V | upper limit VDD + 0.3 V | 7 | |||
| Input Current to Any Pin Except Supplies | -10 | 10 | mA | Transient currents of up to 100 mA do not cause SCR latch-up | 7 | ||
| Operating Temperature Range (B Version) | -40 | 125 | °C | 7 | |||
| Storage Temperature Range | -65 | 150 | °C | 7 | |||
| Junction Temperature | 150 | °C | 7 | ||||
| Thermal Impedance θJA | θJA | 200 | °C/W | 10-Lead MSOP | 7 | ||
| Thermal Impedance θJC | θJC | 44 | °C/W | 10-Lead MSOP | 7 | ||
| Pb-Free Soldering Reflow Temperature | 260 | °C | Pb-Free, +0 | 7 | |||
| ESD | 1.5 | kV | 7 | ||||
| Supply Voltage Range | VDD | 2.7 | 5.5 | V | Specified VDD range | 3 |
CAD (KiCad official)
- Symbol:
AD7992BRMZ-1 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ad7992brmz-1-etched.step/ad7992brmz-1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7992brmz-1.step/ad7992brmz-1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (28 pp, sha256
dff277b879258363, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).