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AD7982BRMZRL7

Public Made by Adom

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Analog Devices Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionad7982brmzrl7factory-2.0.0extractor-text

Verified AD7982BRMZRL7

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 10 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD7982BRMZRL7 · MSOP-10 · 10 pins
  • ✓copper: 10 copper pads, none touching another net
  • ✓datasheet: all 10 pin names found in the 26-page datasheet
  • ✓distributor: lcsc C578580, digikey 505-AD7982BRMZRL7TR-ND, mouser 584-AD7982BRMZR7
  • ✓family: MSOP-10_3x3mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-v7vac19g/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.26)
  • ✓pads: 10 pins = 10 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 10 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad7982brmzrl7.kicad_sym✓ ad7982brmzrl7.kicad_mod✓ ad7982brmzrl7.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers ad7982brmzrl7: viewers · Ray 3d ago
ad7982brmzrl7-etched.glb Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7-etched.step ad7982brmzrl7: factory component page (tier=mfr) · Ray 3d ago
ad7982brmzrl7-hero.glb ad7982brmzrl7: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
ad7982brmzrl7-hero.overlay.json Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7.glb Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7.kicad_mod Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7.kicad_sym Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7.lbr Publish 0.1.0 · Ray 3d ago
ad7982brmzrl7.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 10 pins · Ray 3d ago

AD7982BRMZRL7

Analog Devices · Analog To Digital Converters (ADCs) · MSOP-10

AD7982BRMZRL7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF power_in Reference input voltage with a range of 2.4 V to 5.1 V, referred to GND and decoupled closely to the GND pin with a 10 μF capacitor.
2 VDD power_in Power supply (2.5 V nominal; absolute maximum VDD to GND is -0.3 V to +3.0 V).
3 IN+ input Differential positive analog input, absolute maximum -0.3 V to VREF + 0.3 V.
4 IN- input Differential negative analog input, absolute maximum -0.3 V to VREF + 0.3 V.
5 GND power_in Power supply ground.
6 CNV input Convert input whose leading edge initiates conversion and selects chain mode or CS mode; in CS mode SDO is enabled when CNV is low, in chain mode data must be read when CNV is high.
7 SDO output Serial data output carrying the conversion result, synchronized to SCK.
8 SCK input Serial data clock input that shifts out the conversion result when the device is selected.
9 SDI input Serial data input that selects chain mode if low at the CNV rising edge or CS mode if high, and in chain mode daisy-chains other ADC results onto SDO with a delay of 18 SCK cycles.
10 VIO power_in Input/output interface digital power, nominally at the host interface supply (1.8 V, 2.5 V, 3 V, or 5 V).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category ADC/DAC/Data Conversion
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage REF, VIO to GND -0.3 6 V REF, VIO to GND 8
Supply Voltage VDD to GND -0.3 3 V VDD to GND 8
VDD to VIO -6 3 V printed as +3 V to -6 V 8
Analog Inputs IN+, IN- to GND -0.3 V -0.3 V to VREF + 0.3 V 8
Analog Inputs IN+, IN- current -130 130 mA IN+, IN- to GND, printed as ±130 mA 8
Digital Inputs to GND -0.3 V -0.3 V to VIO + 0.3 V 8
Digital Outputs to GND -0.3 V -0.3 V to VIO + 0.3 V 8
Storage Temperature Range -65 150 °C 8
Junction Temperature 150 °C 8
Lead Temperature Vapor Phase 215 °C 60 sec 8
Lead Temperature Infrared 220 °C 15 sec 8
Thermal Resistance Junction to Ambient θJA 200 °C/W RM-10, 2S2P JEDEC PCB simulated 8
Thermal Resistance Junction to Case θJC 44 °C/W RM-10, 2S2P JEDEC PCB simulated 8
Throughput Rate 800 kSPS VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = -40°C to +85°C 7
Conversion Time: CNV Rising Edge to Data Available tCONV 500 800 ns VIO = 1.71 V to 2.3 V 7
Acquisition Time tACQ 290 ns VIO = 1.71 V to 2.3 V 7
Time Between Conversions tCYC 1.25 μs VIO = 1.71 V to 2.3 V 7
CNV Pulse Width (CS Mode) tCNVH 10 ns VIO = 1.71 V to 2.3 V 7
SCK Period (CS Mode) tSCK 22 ns VIO = 1.71 V to 2.3 V 7
SCK Period (Chain Mode) tSCK 23 ns VIO = 1.71 V to 2.3 V 7
SCK Low Time tSCKL 6 ns VIO = 1.71 V to 2.3 V 7
SCK High Time tSCKH 6 ns VIO = 1.71 V to 2.3 V 7
SCK Falling Edge to Data Remains Valid tHSDO 3 ns VIO = 1.71 V to 2.3 V 7
SCK Falling Edge to Data Valid Delay tDSDO 14 21 ns VIO = 1.71 V to 2.3 V 7
CNV or SDI Low to SDO D17 MSB Valid tEN 18 40 ns CS mode, VIO = 1.71 V to 2.3 V 7
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance tDIS 20 ns CS mode, VIO = 1.71 V to 2.3 V 7
SDI Valid Setup Time from CNV Rising Edge tSSDICNV 5 ns CS mode 7
SDI Valid Hold Time from CNV Rising Edge tHSDICNV 10 ns CS mode 7
SDI Valid Hold Time from CNV Rising Edge tHSDICNV 0 ns Chain mode 7
SCK Valid Setup Time from CNV Rising Edge tSSCKCNV 5 ns Chain mode 7
SCK Valid Hold Time from CNV Rising Edge tHSCKCNV 5 ns Chain mode 7
SDI Valid Setup Time from SCK Falling Edge tSSDISCK 2 ns Chain mode 7
SDI Valid Hold Time from SCK Falling Edge tHSDISCK 3 ns Chain mode 7
SDI High to SDO High (Chain Mode with Busy Indicator) tDSDOSDI 22 ns Chain mode with busy indicator 7

CAD (KiCad official)

  • Symbol: AD7982BRMZRL7
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad7982brmzrl7-etched.step / ad7982brmzrl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7982brmzrl7.step / ad7982brmzrl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 2fb3a9a435bd1cb4, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF