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AD7980BRMZRL7

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Analog Devices Analog To Digital Converters (ADC), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD7980BRMZRL7

Analog Devices · Analog To Digital Converters (ADC) · MSOP-10

AD7980BRMZRL7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input voltage, referred to GND and to be decoupled closely with a 10 µF capacitor; the datasheet pin table gives a REF range of 2.4 V to 5.1 V.
2 VDD power_in Power supply, with VDD to GND absolute maximum rating of −0.3 V to +3 V.
3 IN+ input Analog input referred to IN−, with the input voltage range (IN+ minus IN−) of 0 V to VREF.
4 IN− input Analog input ground sense, to be connected to the analog ground plane or to a remote sense ground.
5 GND power_in Power supply ground.
6 CNV input Convert input: its leading edge starts a conversion and selects chain or CS interface mode, and in CS mode a low level enables SDO.
7 SDO output Serial data output carrying the conversion result, synchronized to SCK, with digital outputs limited to −0.3 V to VIO + 0.3 V to GND.
8 SCK input Serial data clock input that shifts the conversion result out when the device is selected.
9 SDI input Serial data input that selects the interface mode at the CNV rising edge: low selects chain mode and high selects CS mode.
10 VIO power_in Input/output interface digital power, nominally at the host interface supply of 1.8 V, 2.5 V, 3 V, or 5 V, with VIO to GND absolute maximum rating of −0.3 V to +6 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Data Acquisition
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog inputs IN+, IN− to GND -0.3 V Upper limit VREF + 0.3 V, or ±130 mA (see Analog Input section) 8
REF, VIO to GND -0.3 6 V 8
VDD to GND -0.3 3 V 8
VDD to VIO -6 3 V Printed as +3 V to −6 V 8
Digital inputs to GND -0.3 V Upper limit VIO + 0.3 V 8
Digital outputs to GND -0.3 V Upper limit VIO + 0.3 V 8
Storage temperature range -65 150 °C 8
Junction temperature 150 °C 8
Lead temperature, vapor phase 215 °C 60 sec 8
Lead temperature, infrared 220 °C 15 sec 8
Operating temperature range -40 125 °C Wide operating temperature range, operation specified 1
REF input voltage range REF 2.4 5.1 V Pin 1 REF, referred to GND pin 9
Thermal resistance, junction to ambient (RM-10) θJA 200 °C/W Test Condition 1: simulated on 2S2P JEDEC PCB 8
Thermal resistance, junction to case (RM-10) θJC 44 °C/W Test Condition 1: simulated on 2S2P JEDEC PCB 8
Throughput rate 833 kSPS VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
Conversion time: CNV rising edge to data available tCONV 500 800 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
Acquisition time tACQ 290 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
Time between conversions tCYC 1.2 μs VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
CNV pulse width (CS mode) tCNVH 10 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK period (CS mode) tSCK 22 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK period (chain mode) tSCK 23 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK low time tSCKL 6 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK high time tSCKH 6 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK falling edge to data remains valid tHSDO 3 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK falling edge to data valid delay tDSDO 14 21 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
CNV or SDI low to SDO D15 MSB valid (CS mode) tEN 18 40 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
CNV or SDI high or last SCK falling edge to SDO high impedance (CS mode) tDIS 20 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI valid setup time from CNV rising edge tSSDICNV 5 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI valid hold time from CNV rising edge (CS mode) tHSDICNV 10 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI valid hold time from CNV rising edge (chain mode) tHSDICNV 0 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK valid setup time from CNV rising edge (chain mode) tSSCKCNV 5 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SCK valid hold time from CNV rising edge (chain mode) tHSCKCNV 5 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI valid setup time from SCK falling edge (chain mode) tSSDISCK 2 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI valid hold time from SCK falling edge (chain mode) tHSDISCK 3 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7
SDI high to SDO high (chain mode with busy indicator) tDSDOSDI 22 ns VDD = 2.37 V to 2.63 V, VIO = 1.71 V to 2.3 V, TA = −40°C to +125°C 7

CAD (KiCad official)

  • Symbol: AD7980BRMZRL7
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad7980brmzrl7-etched.step / ad7980brmzrl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7980brmzrl7.step / ad7980brmzrl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (27 pp, sha256 b8147e62bffca0ab, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF